| /art/compiler/dex/ |
| gvn_dead_code_elimination_test.cc | 287 mir->ssa_rep = &ssa_reps_[i];
289 std::copy_n(def->uses, def->num_uses, mir->ssa_rep->uses);
290 // Keep mir->ssa_rep->fp_use[.] zero-initialized (false). Not used by DCE, only copied.
292 std::copy_n(def->defs, def->num_defs, mir->ssa_rep->defs);
293 // Keep mir->ssa_rep->fp_def[.] zero-initialized (false). Not used by DCE, only copied.
310 mir->dalvikInsn.vA = SRegToVReg(mir->ssa_rep->uses, &use, (df_attrs & DF_A_WIDE) != 0);
313 mir->dalvikInsn.vB = SRegToVReg(mir->ssa_rep->uses, &use, (df_attrs & DF_B_WIDE) != 0);
316 mir->dalvikInsn.vC = SRegToVReg(mir->ssa_rep->uses, &use, (df_attrs & DF_C_WIDE) != 0);
617 ASSERT_EQ(1, mirs_[3].ssa_rep->num_uses);
618 EXPECT_EQ(0, mirs_[3].ssa_rep->uses[0])
[all...] |
| gvn_dead_code_elimination.cc | 365 SSARepresentation* ssa_rep = mir_data_[c].mir->ssa_rep; local
366 for (int i = 0; i != ssa_rep->num_uses; ++i) {
367 if (ssa_rep->uses[i] == s_reg) {
380 SSARepresentation* ssa_rep = mir_data_[c].mir->ssa_rep; local
381 for (int i = 0; i != ssa_rep->num_uses; ++i) {
382 if (mir_graph->SRegToVReg(ssa_rep->uses[i]) == v_reg) {
393 SSARepresentation* ssa_rep = mir_data_[c].mir->ssa_rep; local
908 SSARepresentation* ssa_rep = data->mir->ssa_rep; local
[all...] |
| mir_optimization.cc | 63 if (mir->ssa_rep == nullptr) {
81 SetConstant(mir->ssa_rep->defs[0], vB);
84 SetConstant(mir->ssa_rep->defs[0], vB << 16);
88 SetConstantWide(mir->ssa_rep->defs[0], static_cast<int64_t>(vB));
91 SetConstantWide(mir->ssa_rep->defs[0], d_insn->vB_wide);
94 SetConstantWide(mir->ssa_rep->defs[0], static_cast<int64_t>(vB) << 48);
104 for (i = 0; i < mir->ssa_rep->num_uses; i++) {
105 if (!is_constant_v_->IsBitSet(mir->ssa_rep->uses[i])) break;
108 if (i == mir->ssa_rep->num_uses) {
109 SetConstant(mir->ssa_rep->defs[0], constant_values_[mir->ssa_rep->uses[0]])
[all...] |
| local_value_numbering.cc | 388 int s_reg = pred_bb->last_mir_insn->ssa_rep->uses[0];
705 int s_reg = least_entries_bb->last_mir_insn->ssa_rep->uses[0];
[all...] |
| mir_dataflow.cc | 1076 mir->ssa_rep->num_uses = num_uses;
1078 if (mir->ssa_rep->num_uses_allocated < num_uses) {
1079 mir->ssa_rep->uses = arena_->AllocArray<int32_t>(num_uses, kArenaAllocDFInfo);
1084 mir->ssa_rep->num_defs = num_defs;
1086 if (mir->ssa_rep->num_defs_allocated < num_defs) {
1087 mir->ssa_rep->defs = arena_->AllocArray<int32_t>(num_defs, kArenaAllocDFInfo);
1100 HandleSSAUse(mir->ssa_rep->uses, d_insn->arg[i], i);
1113 HandleSSAUse(mir->ssa_rep->uses, d_insn->vC+i, i);
1130 HandleSSAUse(mir->ssa_rep->uses, d_insn.vA, 0);
1132 HandleSSAUse(mir->ssa_rep->uses, d_insn.vA + 1, 1)
[all...] |
| mir_graph.cc | 1302 SSARepresentation* ssa_rep = mir->ssa_rep; local
1508 SSARepresentation* ssa_rep = mir->ssa_rep; local
2380 SSARepresentation *ssa_rep = mir->ssa_rep; local
[all...] |
| type_inference.cc | 168 int32_t s_reg = check_cast->ssa_rep->uses[0];
266 sregs[entry.first->ssa_rep->uses[0]].MergeNonArrayFlags(
320 auto sreg_it = split_sreg_data_.find(mir->ssa_rep->uses[0]);
333 int32_t s_reg = check_cast->ssa_rep->uses[0];
430 size_t num_uses = mir->ssa_rep->num_uses;
431 const int32_t* uses = mir->ssa_rep->uses;
432 const int32_t* defs = mir->ssa_rep->defs;
460 size_t num_uses = mir->ssa_rep->num_uses;
461 const int32_t* uses = mir->ssa_rep->uses;
462 const int32_t* defs = mir->ssa_rep->defs
[all...] |
| global_value_numbering.cc | 179 int s_reg = pred_bb->last_mir_insn->ssa_rep->uses[0];
212 uint16_t operand = lvns_[pred_id]->GetSregValue(pred_bb->last_mir_insn->ssa_rep->uses[0]);
|
| mir_graph.h | 337 SSARepresentation* ssa_rep; member in class:art::MIR
357 next(nullptr), ssa_rep(nullptr) {
874 DCHECK(num < mir->ssa_rep->num_uses);
875 RegLocation res = reg_location_[mir->ssa_rep->uses[num]];
880 DCHECK_GT(mir->ssa_rep->num_defs, 0);
881 RegLocation res = reg_location_[mir->ssa_rep->defs[0]];
[all...] |
| local_value_numbering_test.cc | 158 mir->ssa_rep = &ssa_reps_[i];
159 mir->ssa_rep->num_uses = def->num_uses;
160 mir->ssa_rep->uses = const_cast<int32_t*>(def->uses); // Not modified by LVN.
161 mir->ssa_rep->num_defs = def->num_defs;
162 mir->ssa_rep->defs = const_cast<int32_t*>(def->defs); // Not modified by LVN.
[all...] |
| type_inference_test.cc | 427 mir->ssa_rep = &ssa_reps_[i];
428 mir->ssa_rep->num_uses = def->num_uses;
429 mir->ssa_rep->uses = const_cast<int32_t*>(def->uses); // Not modified by LVN.
430 mir->ssa_rep->num_defs = def->num_defs;
431 mir->ssa_rep->defs = const_cast<int32_t*>(def->defs); // Not modified by LVN.
682 ASSERT_LE(1u, mirs_[i].ssa_rep->num_defs);
683 ExpectSRegType(mirs_[i].ssa_rep->defs[0], expectations[i]);
737 ASSERT_LE(1u, mirs_[i].ssa_rep->num_defs);
738 ExpectSRegType(mirs_[i].ssa_rep->defs[0], expectations[i]);
805 ASSERT_LE(1u, mirs_[2 * i].ssa_rep->num_defs)
[all...] |
| ssa_transformation.cc | 511 int ssa_reg = mir->ssa_rep->defs[0];
518 int* uses = mir->ssa_rep->uses;
|
| global_value_numbering_test.cc | 259 mir->ssa_rep = &ssa_reps_[i];
260 mir->ssa_rep->num_uses = def->num_uses;
261 mir->ssa_rep->uses = const_cast<int32_t*>(def->uses); // Not modified by LVN.
262 mir->ssa_rep->num_defs = def->num_defs;
263 mir->ssa_rep->defs = const_cast<int32_t*>(def->defs); // Not modified by LVN.
[all...] |
| mir_optimization_test.cc | 309 mir->ssa_rep = nullptr;
[all...] |
| /art/compiler/dex/quick/ |
| codegen_util.cc | [all...] |
| /art/compiler/dex/quick/arm/ |
| int_arm.cc | 252 if (mir->ssa_rep->num_uses == 1) {
295 RegLocation rl_true = mir_graph_->reg_location_[mir->ssa_rep->uses[1]];
296 RegLocation rl_false = mir_graph_->reg_location_[mir->ssa_rep->uses[2]];
[all...] |
| /art/compiler/dex/quick/arm64/ |
| int_arm64.cc | 201 if (mir->ssa_rep->num_uses == 1) {
207 RegLocation rl_true = mir_graph_->reg_location_[mir->ssa_rep->uses[1]];
208 RegLocation rl_false = mir_graph_->reg_location_[mir->ssa_rep->uses[2]];
[all...] |
| /art/compiler/dex/quick/x86/ |
| int_x86.cc | 284 const bool is_constant_case = (mir->ssa_rep->num_uses == 1);
[all...] |
