/system/core/libpixelflinger/arch-mips/ |
t32cb16blend.S | 32 * Uses $t0,$t6,$t7,$t8 52 ext $t8,\dreg,\shift+6+5,5 # dst[\shift:15..11] 53 mul $t6,$t8,$t7 55 ext $t8,\src,3,5 # src[7..3] 57 addu $t8,$t6 58 ins \fb,$t8,\shift+6+5,5 # dst[\shift:15..11] 61 mul $t8,$t0,$t7 64 srl $t8,8 65 addu $t8,$t6 69 ins \fb,$t8,\shift+5,6 # finish green insertion dst[\shift:10..5 [all...] |
/bionic/libc/arch-mips/string/ |
strcmp.S | 99 lui t8, 0x0101 100 ori t8, t8, 0x0101 107 subu t0, v0, t8; \ 139 subu t0, v0, t8 167 srl t8, v0, 8 169 andi t8, t8, 0xff 170 beq t8, zero, L(wexit89) 172 bne t8, t9, L(wexit89 [all...] |
memcpy.S | 338 xor t8,a1,a0 339 andi t8,t8,(NSIZE-1) /* t8 is a0/a1 word-displacement */ 340 bne t8,zero,L(unaligned) 347 C_LDHI t8,0(a1) 349 C_STHI t8,0(a0) 359 andi t8,a0,7 361 PTR_LSA t9,t8,t9,2 395 subu t8,t9,t [all...] |
/external/clang/test/CodeGen/ |
ms_struct-bitfield-1.c | 70 } ATTR t8; variable in typeref:struct:__anon6171 71 static int a8[(sizeof(t8) == 4) -1];
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ms_struct-bitfield.c | 104 } ATTR t8; variable in typeref:struct:__anon6184 105 int s8 = sizeof(t8);
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/external/valgrind/none/tests/mips32/ |
mips32_dspr2.c | [all...] |
mips32_dsp.c | [all...] |
/development/ndk/platforms/android-21/arch-mips/include/machine/ |
regdef.h | 83 #define t8 $24 /* two more temp registers */ macro
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/development/ndk/platforms/android-9/arch-mips/include/machine/ |
regdef.h | 83 #define t8 $24 /* two more temp registers */ macro
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/external/clang/test/Sema/ |
attr-naked.c | 38 __attribute__((naked)) void t8(int z) { // expected-note{{attribute is here}} function
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/prebuilts/ndk/8/platforms/android-14/arch-mips/usr/include/machine/ |
regdef.h | 83 #define t8 $24 /* two more temp registers */ macro
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/prebuilts/ndk/8/platforms/android-9/arch-mips/usr/include/machine/ |
regdef.h | 83 #define t8 $24 /* two more temp registers */ macro
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/prebuilts/ndk/9/platforms/android-12/arch-mips/usr/include/machine/ |
regdef.h | 83 #define t8 $24 /* two more temp registers */ macro
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/prebuilts/ndk/9/platforms/android-13/arch-mips/usr/include/machine/ |
regdef.h | 83 #define t8 $24 /* two more temp registers */ macro
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/prebuilts/ndk/9/platforms/android-14/arch-mips/usr/include/machine/ |
regdef.h | 83 #define t8 $24 /* two more temp registers */ macro
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/prebuilts/ndk/9/platforms/android-15/arch-mips/usr/include/machine/ |
regdef.h | 83 #define t8 $24 /* two more temp registers */ macro
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/prebuilts/ndk/9/platforms/android-16/arch-mips/usr/include/machine/ |
regdef.h | 83 #define t8 $24 /* two more temp registers */ macro
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/prebuilts/ndk/9/platforms/android-17/arch-mips/usr/include/machine/ |
regdef.h | 83 #define t8 $24 /* two more temp registers */ macro
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/prebuilts/ndk/9/platforms/android-18/arch-mips/usr/include/machine/ |
regdef.h | 83 #define t8 $24 /* two more temp registers */ macro
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/prebuilts/ndk/9/platforms/android-19/arch-mips/usr/include/machine/ |
regdef.h | 83 #define t8 $24 /* two more temp registers */ macro
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/prebuilts/ndk/9/platforms/android-21/arch-mips/usr/include/machine/ |
regdef.h | 83 #define t8 $24 /* two more temp registers */ macro
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/prebuilts/ndk/9/platforms/android-9/arch-mips/usr/include/machine/ |
regdef.h | 83 #define t8 $24 /* two more temp registers */ macro
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/frameworks/av/media/libstagefright/codecs/on2/h264dec/omxdl/arm11/vc/m4p10/src/ |
armVCM4P10_DeblockingLuma_unsafe_s.s | 116 t8 RN 6 label 271 USUB8 t8, q_1, q_0 272 SHADD8 t8, t5, t8 275 SADD8 t8, t8, t9 276 SHSUB8 t8, t8, t2 278 SHADD8 t8, t8, m0 [all...] |
/development/ndk/platforms/android-9/arch-mips/include/asm/ |
regdef.h | 54 #define t8 $24 macro 104 #define t8 $24 macro
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/prebuilts/ndk/8/platforms/android-14/arch-mips/usr/include/asm/ |
regdef.h | 54 #define t8 $24 macro 104 #define t8 $24 macro
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