| /external/llvm/test/MC/Mips/ |
| micromips-trap-instructions.s | 15 # CHECK-EL: tlt $8, $9 # encoding: [0x28,0x01,0x3c,0x08]
30 # CHECK-EB: tlt $8, $9 # encoding: [0x01,0x28,0x08,0x3c]
42 tlt $8, $9, 0
|
| mips-control-instructions.s | 29 # CHECK32: tlt $zero, $3 # encoding: [0x00,0x03,0x00,0x32]
30 # CHECK32: tlt $zero, $3, 31 # encoding: [0x00,0x03,0x07,0xf2]
62 # CHECK64: tlt $zero, $3 # encoding: [0x00,0x03,0x00,0x32]
63 # CHECK64: tlt $zero, $3, 31 # encoding: [0x00,0x03,0x07,0xf2]
98 tlt $0,$3
99 tlt $0,$3,31
|
| /external/llvm/test/MC/Mips/mips1/ |
| invalid-mips2.s | 37 tlt $15,$13 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
38 tlt $2,$19,133 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
|
| /external/llvm/test/MC/Mips/mips2/ |
| valid.s | 161 tlt $15,$13 # CHECK: tlt $15, $13 # encoding: [0x01,0xed,0x00,0x32]
162 tlt $2,$19,133 # CHECK: tlt $2, $19, 133 # encoding: [0x00,0x53,0x21,0x72]
|
| /external/llvm/test/MC/Mips/mips32/ |
| valid.s | 191 tlt $15,$13 # CHECK: tlt $15, $13 # encoding: [0x01,0xed,0x00,0x32]
192 tlt $2,$19,133 # CHECK: tlt $2, $19, 133 # encoding: [0x00,0x53,0x21,0x72]
|
| /external/llvm/test/MC/Mips/mips3/ |
| valid.s | 222 tlt $15,$13 # CHECK: tlt $15, $13 # encoding: [0x01,0xed,0x00,0x32]
223 tlt $2,$19,133 # CHECK: tlt $2, $19, 133 # encoding: [0x00,0x53,0x21,0x72]
|
| /external/llvm/test/MC/Mips/mips32r2/ |
| valid.s | 228 tlt $15,$13 # CHECK: tlt $15, $13 # encoding: [0x01,0xed,0x00,0x32]
229 tlt $2,$19,133 # CHECK: tlt $2, $19, 133 # encoding: [0x00,0x53,0x21,0x72]
|
| /external/llvm/test/MC/Mips/mips32r3/ |
| valid.s | 228 tlt $15,$13 # CHECK: tlt $15, $13 # encoding: [0x01,0xed,0x00,0x32]
229 tlt $2,$19,133 # CHECK: tlt $2, $19, 133 # encoding: [0x00,0x53,0x21,0x72]
|
| /external/llvm/test/MC/Mips/mips32r5/ |
| valid.s | 228 tlt $15,$13 # CHECK: tlt $15, $13 # encoding: [0x01,0xed,0x00,0x32]
229 tlt $2,$19,133 # CHECK: tlt $2, $19, 133 # encoding: [0x00,0x53,0x21,0x72]
|
| /external/llvm/test/MC/Mips/mips4/ |
| valid.s | 251 tlt $15,$13 # CHECK: tlt $15, $13 # encoding: [0x01,0xed,0x00,0x32]
252 tlt $2,$19,133 # CHECK: tlt $2, $19, 133 # encoding: [0x00,0x53,0x21,0x72]
|
| /external/llvm/test/MC/Mips/mips5/ |
| valid.s | 253 tlt $15,$13 # CHECK: tlt $15, $13 # encoding: [0x01,0xed,0x00,0x32]
254 tlt $2,$19,133 # CHECK: tlt $2, $19, 133 # encoding: [0x00,0x53,0x21,0x72]
|
| /external/llvm/test/MC/Mips/mips64/ |
| valid.s | 270 tlt $15,$13 # CHECK: tlt $15, $13 # encoding: [0x01,0xed,0x00,0x32]
271 tlt $2,$19,133 # CHECK: tlt $2, $19, 133 # encoding: [0x00,0x53,0x21,0x72]
|
| /external/llvm/test/MC/Mips/mips64r2/ |
| valid.s | 296 tlt $15,$13 # CHECK: tlt $15, $13 # encoding: [0x01,0xed,0x00,0x32]
297 tlt $2,$19,133 # CHECK: tlt $2, $19, 133 # encoding: [0x00,0x53,0x21,0x72]
|
| /external/llvm/test/MC/Mips/mips64r3/ |
| valid.s | 296 tlt $15,$13 # CHECK: tlt $15, $13 # encoding: [0x01,0xed,0x00,0x32]
297 tlt $2,$19,133 # CHECK: tlt $2, $19, 133 # encoding: [0x00,0x53,0x21,0x72]
|
| /external/llvm/test/MC/Mips/mips64r5/ |
| valid.s | 296 tlt $15,$13 # CHECK: tlt $15, $13 # encoding: [0x01,0xed,0x00,0x32]
297 tlt $2,$19,133 # CHECK: tlt $2, $19, 133 # encoding: [0x00,0x53,0x21,0x72]
|
| /external/v8/test/cctest/ |
| test-disasm-mips.cc | 390 COMPARE(tlt(a0, a1, 0),
391 "00850032 tlt a0, a1, code: 0x000");
392 COMPARE(tlt(s0, s1, 1023),
393 "0211fff2 tlt s0, s1, code: 0x3ff");
|
| test-disasm-mips64.cc | 543 COMPARE(tlt(a0, a1, 0),
544 "00850032 tlt a0, a1, code: 0x000");
545 COMPARE(tlt(s0, s1, 1023),
546 "0211fff2 tlt s0, s1, code: 0x3ff");
|
| /external/v8/src/mips/ |
| disasm-mips.cc | 277 case TLT:
780 case TLT:
781 Format(instr, "tlt 'rs, 'rt, code: 'code");
[all...] |
| assembler-mips.h | 821 void tlt(Register rs, Register rt, uint16_t code);
[all...] |
| assembler-mips.cc | 1830 void Assembler::tlt(Register rs, Register rt, uint16_t code) { function in class:v8::Assembler
[all...] |
| /external/v8/src/mips64/ |
| disasm-mips64.cc | 278 case TLT:
907 case TLT:
908 Format(instr, "tlt 'rs, 'rt, code: 'code");
[all...] |
| assembler-mips64.h | 851 void tlt(Register rs, Register rt, uint16_t code);
[all...] |
| assembler-mips64.cc | 2025 void Assembler::tlt(Register rs, Register rt, uint16_t code) { function in class:v8::Assembler
[all...] |
