/external/valgrind/VEX/priv/ |
host_mips_isel.c | 402 HReg tmpregs[MIPS_N_REGPARMS]; local 465 tmpregs[0] = tmpregs[1] = tmpregs[2] = 466 tmpregs[3] = tmpregs[4] = tmpregs[5] = 467 tmpregs[6] = tmpregs[7] = INVALID_HREG; 474 tmpregs[0] = tmpregs[1] = tmpregs[2] = tmpregs[3] = INVALID_HREG [all...] |
host_tilegx_isel.c | 219 HReg tmpregs[TILEGX_N_REGPARMS]; local 269 tmpregs[i] = INVALID_HREG; 323 tmpregs[argreg] = iselWordExpr_R(env, args[i]); 343 if (hregIsInvalid(tmpregs[i])) // Skip invalid regs 348 addInstr(env, mk_iMOVds_RR(argregs[i], tmpregs[i])); [all...] |
host_arm64_isel.c | 484 HReg tmpregs[ARM64_N_ARGREGS]; local 596 tmpregs[0] = tmpregs[1] = tmpregs[2] = tmpregs[3] = INVALID_HREG; 597 tmpregs[4] = tmpregs[5] = tmpregs[6] = tmpregs[7] = INVALID_HREG; 689 tmpregs[nextArgReg] = iselIntExpr_R(env, args[i]) [all...] |
host_ppc_isel.c | 726 HReg tmpregs[PPC_N_REGPARMS]; local 823 tmpregs[0] = tmpregs[1] = tmpregs[2] = 824 tmpregs[3] = tmpregs[4] = tmpregs[5] = 825 tmpregs[6] = tmpregs[7] = INVALID_HREG; [all...] |
host_amd64_isel.c | 436 HReg tmpregs[6]; local 523 tmpregs[0] = tmpregs[1] = tmpregs[2] = 524 tmpregs[3] = tmpregs[4] = tmpregs[5] = INVALID_HREG; 614 tmpregs[i] = newVRegI(env); 615 addInstr(env, mk_iMOVsd_RR( hregAMD64_RBP(), tmpregs[i])); 622 tmpregs[i] = r_vecRetAddr [all...] |
host_s390_isel.c | 518 HReg tmpregs[S390_NUM_GPRPARMS]; local 583 tmpregs[argreg] = newVRegI(env); 584 addInstr(env, s390_insn_move(sizeof(ULong), tmpregs[argreg], 587 tmpregs[argreg] = s390_isel_int_expr(env, args[i]); 611 addInstr(env, s390_insn_move(size, finalreg, tmpregs[i])); [all...] |
host_x86_isel.c | 436 HReg tmpregs[3]; local 559 tmpregs[0] = tmpregs[1] = tmpregs[2] = INVALID_HREG; 595 tmpregs[argreg] = iselIntExpr_R(env, arg); 602 addInstr( env, mk_iMOVsd_RR( tmpregs[argregX], argregs[argregX] ) ); [all...] |
host_arm_isel.c | 388 HReg tmpregs[ARM_N_ARGREGS]; local 478 tmpregs[0] = tmpregs[1] = tmpregs[2] = 479 tmpregs[3] = INVALID_HREG; 589 tmpregs[nextArgReg] = iselIntExpr_R(env, args[i]); 600 tmpregs[nextArgReg] = raLo; 602 tmpregs[nextArgReg] = raHi; 607 tmpregs[nextArgReg] = hregARM_R8(); 635 if (hregIsInvalid(tmpregs[i])) { // Skip invalid reg [all...] |