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  /external/llvm/lib/Analysis/
Delinearization.cpp 48 static char ID; // Pass identification, replacement for typeid
50 Delinearization() : FunctionPass(ID) {
140 char Delinearization::ID = 0;
DomPrinter.cpp 93 static char ID;
97 "dom", ID) {
105 static char ID;
109 "domonly", ID) {
116 static char ID;
118 DOTGraphTraitsViewer<PostDominatorTree, false>("postdom", ID){
125 static char ID;
127 DOTGraphTraitsViewer<PostDominatorTree, true>("postdomonly", ID){
133 char DomViewer::ID = 0;
137 char DomOnlyViewer::ID = 0
    [all...]
MemDepPrinter.cpp 42 static char ID; // Pass identifcation, replacement for typeid
43 MemDepPrinter() : FunctionPass(ID) {
79 char MemDepPrinter::ID = 0;
RegionInfo.cpp 110 RegionInfoPass::RegionInfoPass() : FunctionPass(ID) {
154 char RegionInfoPass::ID = 0;
RegionPrinter.cpp 149 static char ID;
150 RegionViewer() : DOTGraphTraitsViewer<RegionInfoPass, false>("reg", ID){
154 char RegionViewer::ID = 0;
158 static char ID;
159 RegionOnlyViewer() : DOTGraphTraitsViewer<RegionInfoPass, true>("regonly", ID) {
163 char RegionOnlyViewer::ID = 0;
167 static char ID;
169 DOTGraphTraitsPrinter<RegionInfoPass, false>("reg", ID) {
173 char RegionPrinter::ID = 0;
190 static char ID;
    [all...]
ScopedNoAliasAA.cpp 13 // Alias-analysis scopes are defined by an id (which can be a string or some
15 // A domain is defined by an id (which can be a string or some other metadata
78 static char ID; // Class identification, replacement for typeinfo
79 ScopedNoAliasAA() : ImmutablePass(ID) {
90 if (PI == &AliasAnalysis::ID)
114 char ScopedNoAliasAA::ID = 0;
  /external/llvm/lib/CodeGen/
ExpandPostRAPseudos.cpp 37 static char ID; // Pass identification, replacement for typeid
38 ExpandPostRA() : MachineFunctionPass(ID) {}
58 char ExpandPostRA::ID = 0;
59 char &llvm::ExpandPostRAPseudosID = ExpandPostRA::ID;
GCMetadata.cpp 29 static char ID;
33 explicit Printer(raw_ostream &OS) : FunctionPass(ID), OS(OS) {}
55 char GCModuleInfo::ID = 0;
57 GCModuleInfo::GCModuleInfo() : ImmutablePass(ID) {
84 char Printer::ID = 0;
MachineRegionInfo.cpp 73 MachineRegionInfoPass::MachineRegionInfoPass() : MachineFunctionPass(ID) {
121 char MachineRegionInfoPass::ID = 0;
OptimizePHIs.cpp 37 static char ID; // Pass identification
38 OptimizePHIs() : MachineFunctionPass(ID) {
60 char OptimizePHIs::ID = 0;
61 char &llvm::OptimizePHIsID = OptimizePHIs::ID;
RegAllocBasic.cpp 114 static char ID;
117 char RABasic::ID = 0;
121 RABasic::RABasic(): MachineFunctionPass(ID) {
SlotIndexes.cpp 21 char SlotIndexes::ID = 0;
SpillPlacement.h 70 static char ID; // Pass identification, replacement for typeid.
72 SpillPlacement() : MachineFunctionPass(ID), nodes(nullptr) {}
UnreachableBlockElim.cpp 45 static char ID; // Pass identification, replacement for typeid
46 UnreachableBlockElim() : FunctionPass(ID) {
55 char UnreachableBlockElim::ID = 0;
101 static char ID; // Pass identification, replacement for typeid
102 UnreachableMachineBlockElim() : MachineFunctionPass(ID) {}
105 char UnreachableMachineBlockElim::ID = 0;
110 char &llvm::UnreachableMachineBlockElimID = UnreachableMachineBlockElim::ID;
  /external/llvm/lib/ExecutionEngine/Orc/
IndirectionUtils.cpp 76 unsigned ID = Names.size();
78 NameStream << "__orc_anon" << ID++;
  /external/llvm/lib/IR/
Dominators.cpp 344 char DominatorTreeWrapperPass::ID = 0;
  /external/llvm/lib/ProfileData/
CoverageMappingWriter.cpp 41 unsigned ID = C.getExpressionID();
42 AdjustedExpressionIDs[ID] = 1;
43 mark(Expressions[ID].LHS);
44 mark(Expressions[ID].RHS);
92 /// Remaining bits - Counter/Expression ID.
98 unsigned ID = C.getCounterID();
99 assert(ID <=
101 return Tag | (ID << Counter::EncodingTagBits);
110 // Sort the regions in an ascending order by the file id and the starting
137 // Find the number of regions with this file id
    [all...]
  /external/llvm/lib/Target/AArch64/
AArch64A53Fix835769.cpp 85 static char ID;
86 explicit AArch64A53Fix835769() : MachineFunctionPass(ID) {}
102 char AArch64A53Fix835769::ID = 0;
AArch64StorePairSuppress.cpp 38 static char ID;
39 AArch64StorePairSuppress() : MachineFunctionPass(ID) {}
59 char AArch64StorePairSuppress::ID = 0;
  /external/llvm/lib/Target/Hexagon/
HexagonExpandPredSpillCode.cpp 52 static char ID;
53 HexagonExpandPredSpillCode() : MachineFunctionPass(ID) {
65 char HexagonExpandPredSpillCode::ID = 0;
344 &HexagonExpandPredSpillCode::ID,
HexagonFixupHwLoops.cpp 37 static char ID;
39 HexagonFixupHwLoops() : MachineFunctionPass(ID) {
71 char HexagonFixupHwLoops::ID = 0;
HexagonSplitConst32AndConst64.cpp 52 static char ID;
53 HexagonSplitConst32AndConst64() : MachineFunctionPass(ID) {}
62 char HexagonSplitConst32AndConst64::ID = 0;
  /external/llvm/lib/Target/NVPTX/
NVPTXPrologEpilogPass.cpp 34 static char ID;
35 NVPTXPrologEpilogPass() : MachineFunctionPass(ID) {}
48 char NVPTXPrologEpilogPass::ID = 0;
  /external/llvm/lib/Target/PowerPC/
PPCBranchSelector.cpp 39 static char ID;
40 PPCBSel() : MachineFunctionPass(ID) {
53 char PPCBSel::ID = 0;
PPCTLSDynamicCall.cpp 44 static char ID;
45 PPCTLSDynamicCall() : MachineFunctionPass(ID) {
166 char PPCTLSDynamicCall::ID = 0;

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