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  /prebuilts/ndk/9/platforms/android-14/arch-arm/usr/lib/
crtend_so.o 
  /prebuilts/ndk/9/platforms/android-15/arch-arm/usr/lib/
crtend_so.o 
  /prebuilts/ndk/9/platforms/android-16/arch-arm/usr/lib/
crtend_so.o 
  /prebuilts/ndk/9/platforms/android-17/arch-arm/usr/lib/
crtend_so.o 
  /prebuilts/ndk/9/platforms/android-18/arch-arm/usr/lib/
crtend_so.o 
  /prebuilts/ndk/9/platforms/android-19/arch-arm/usr/lib/
crtend_so.o 
  /prebuilts/ndk/9/platforms/android-21/arch-arm/usr/lib/
crtend_so.o 
  /prebuilts/ndk/9/platforms/android-3/arch-arm/usr/lib/
crtend_so.o 
  /prebuilts/ndk/9/platforms/android-4/arch-arm/usr/lib/
crtend_so.o 
  /prebuilts/ndk/9/platforms/android-5/arch-arm/usr/lib/
crtend_so.o 
  /prebuilts/ndk/9/platforms/android-8/arch-arm/usr/lib/
crtend_so.o 
  /prebuilts/ndk/9/platforms/android-9/arch-arm/usr/lib/
crtend_so.o 
  /prebuilts/tools/darwin-x86/jetcreator/
PREBUILT 2 using the source located in external/sonivox/arm-wt-22k/jetcreator_lib_src/darwin-x86/
  /external/llvm/lib/Target/ARM/
ARMBaseInstrInfo.cpp 1 //===-- ARMBaseInstrInfo.cpp - ARM Instruction Information ----------------===//
10 // This file contains the Base ARM implementation of the TargetInstrInfo class.
14 #include "ARM.h"
44 #define DEBUG_TYPE "arm-instrinfo"
50 EnableARM3Addr("enable-arm-3-addr-conv", cl::Hidden,
51 cl::desc("Enable ARM 2-addr to 3-addr conv"));
55 cl::desc("Widen ARM vmovs to vmovd when possible"));
74 { ARM::VMLAS, ARM::VMULS, ARM::VADDS, false, false }
    [all...]
  /external/llvm/test/CodeGen/ARM/
fast-isel.ll 1 ; RUN: llc < %s -O0 -fast-isel-abort=1 -relocation-model=dynamic-no-pic -mtriple=armv7-apple-ios -verify-machineinstrs | FileCheck %s --check-prefix=ARM
2 ; RUN: llc < %s -O0 -fast-isel-abort=1 -relocation-model=dynamic-no-pic -mtriple=armv7-linux-gnueabi -verify-machineinstrs | FileCheck %s --check-prefix=ARM
30 ; ARM-LABEL: test1:
31 ; ARM: tst r0, #1
39 ; ARM-LABEL: test2:
47 ; ARM: add {{.*}} #4096
54 ; ARM: movw {{.*}} #4095
55 ; ARM: add
63 ; ARM: orr {{.*}} #4
68 ; ARM-LABEL: test3
    [all...]
fast-isel-fold.ll 1 ; RUN: llc < %s -O0 -verify-machineinstrs -fast-isel-abort=1 -relocation-model=dynamic-no-pic -mtriple=armv7-apple-darwin | FileCheck %s --check-prefix=ARM
2 ; RUN: llc < %s -O0 -verify-machineinstrs -fast-isel-abort=1 -relocation-model=dynamic-no-pic -mtriple=armv7-linux-gnueabi | FileCheck %s --check-prefix=ARM
9 ; ARM: t1
10 ; ARM: ldrb
11 ; ARM-NOT: uxtb
12 ; ARM-NOT: and{{.*}}, #255
23 ; ARM: t2
24 ; ARM: ldrh
25 ; ARM-NOT: uxth
38 ; ARM: t
    [all...]
fast-isel-icmp.ll 1 ; RUN: llc < %s -O0 -fast-isel-abort=1 -relocation-model=dynamic-no-pic -mtriple=armv7-apple-ios -verify-machineinstrs | FileCheck %s --check-prefix=ARM
2 ; RUN: llc < %s -O0 -fast-isel-abort=1 -relocation-model=dynamic-no-pic -mtriple=armv7-linux-gnueabi -verify-machineinstrs | FileCheck %s --check-prefix=ARM
7 ; ARM: icmp_i16_signed
8 ; ARM: sxth r0, r0
9 ; ARM: sxth r1, r1
10 ; ARM: cmp r0, r1
22 ; ARM: icmp_i16_unsigned
23 ; ARM: uxth r0, r0
24 ; ARM: uxth r1, r1
25 ; ARM: cmp r0, r
    [all...]
prefetch.ll 3 ; RUN: llc -mtriple=arm-eabi -mattr=+v7 %s -o - | FileCheck %s -check-prefix=ARM
4 ; RUN: llc -mtriple=arm-eabi -mcpu=cortex-a9 %s -o - | FileCheck %s -check-prefix=ARM-MP
11 ; ARM-LABEL: t1:
12 ; ARM-NOT: pldw [r0]
13 ; ARM: pld [r0]
15 ; ARM-MP-LABEL: t1:
16 ; ARM-MP: pldw [r0]
17 ; ARM-MP: pld [r0
    [all...]
2010-11-29-PrologueBug.ll 1 ; RUN: llc < %s -mtriple=armv7-apple-ios | FileCheck %s --check-prefix=ARM
7 ; ARM-LABEL: t:
8 ; ARM: push
9 ; ARM: mov r7, sp
10 ; ARM: bl _foo
11 ; ARM: bl _foo
12 ; ARM: bl _foo
13 ; ARM: pop {r7, pc}
arguments2.ll 1 ; RUN: llc < %s -mtriple=arm-linux-gnueabi
2 ; RUN: llc < %s -mtriple=arm-apple-darwin
  /external/llvm/lib/Target/ARM/Disassembler/
ARMDisassembler.cpp 1 //===-- ARMDisassembler.cpp - Disassembler for ARM/Thumb ISA --------------===//
29 #define DEBUG_TYPE "arm-disassembler"
87 /// ARM disassembler for all ARM platforms.
418 case ARM::HVC: {
438 assert(!(STI.getFeatureBits() & ARM::ModeThumb) &&
439 "Asked to disassemble an ARM instruction but Subtarget is in Thumb "
460 // VFP and NEON instructions, similarly, are shared between ARM
583 if (OpInfo[i].isOptionalDef() && OpInfo[i].RegClass == ARM::CCRRegClassID) {
585 MI.insert(I, MCOperand::CreateReg(InITBlock ? 0 : ARM::CPSR))
    [all...]
  /device/asus/fugu/self-extractors/intel/staging/
device-partial.mk 36 vendor/intel/fugu/proprietary/cpuinfo:system/lib/arm/cpuinfo:intel \
37 vendor/intel/fugu/proprietary/libandroidfw.so:system/lib/arm/libandroidfw.so:intel \
38 vendor/intel/fugu/proprietary/libandroid_runtime.so:system/lib/arm/libandroid_runtime.so:intel \
39 vendor/intel/fugu/proprietary/libandroid.so:system/lib/arm/libandroid.so:intel \
40 vendor/intel/fugu/proprietary/libart.so:system/lib/arm/libart.so:intel \
41 vendor/intel/fugu/proprietary/libaudioflinger.so:system/lib/arm/libaudioflinger.so:intel \
42 vendor/intel/fugu/proprietary/libaudioresampler.so:system/lib/arm/libaudioresampler.so:intel \
43 vendor/intel/fugu/proprietary/libaudioutils.so:system/lib/arm/libaudioutils.so:intel \
44 vendor/intel/fugu/proprietary/libbacktrace_libc++.so:system/lib/arm/libbacktrace_libc++.so:intel \
45 vendor/intel/fugu/proprietary/libbacktrace.so:system/lib/arm/libbacktrace.so:intel
    [all...]
  /external/clang/test/Driver/
nacl-direct.c 46 // RUN: | FileCheck --check-prefix=CHECK-ARM %s
47 // CHECK-ARM: {{.*}}clang{{.*}}" "-cc1"
48 // CHECK-ARM: "-fuse-init-array"
49 // CHECK-ARM: "-target-cpu" "cortex-a8"
50 // CHECK-ARM: "-target-abi" "aapcs-linux"
51 // CHECK-ARM: "-mfloat-abi" "hard"
52 // CHECK-ARM: "-resource-dir" "foo"
53 // CHECK-ARM: "-internal-isystem" "foo{{/|\\\\}}include"
54 // CHECK-ARM: "-internal-isystem" "{{.*}}{{/|\\\\}}..{{/|\\\\}}arm-nacl{{/|\\\\}}usr{{/|\\\\}}include
    [all...]
arm-fixed-r9.c 1 // RUN: %clang -target arm-none-gnueabi -ffixed-r9 -### %s 2> %t
4 // CHECK-FIXED-R9: "-backend-option" "-arm-reserve-r9"
  /external/clang/test/Misc/
freebsd-arm-size_t.c 1 // RUN: %clang_cc1 -triple arm-unknown-freebsd10.0 -verify %s
4 /* Define a size_t as expected for FreeBSD ARM */

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