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  /external/llvm/test/CodeGen/ARM/
ldstrex.ll 12 %ldrexd = tail call %0 @llvm.arm.ldrexd(i8* %p)
29 %strexd = tail call i32 @llvm.arm.strexd(i32 %tmp4, i32 %tmp7, i8* %ptr)
33 declare %0 @llvm.arm.ldrexd(i8*) nounwind readonly
34 declare i32 @llvm.arm.strexd(i32, i32, i8*) nounwind
41 %val = call i32 @llvm.arm.ldrex.p0i8(i8* %addr)
51 %val = call i32 @llvm.arm.ldrex.p0i16(i16* %addr)
59 %val = call i32 @llvm.arm.ldrex.p0i32(i32* %addr)
63 declare i32 @llvm.arm.ldrex.p0i8(i8*) nounwind readonly
64 declare i32 @llvm.arm.ldrex.p0i16(i16*) nounwind readonly
65 declare i32 @llvm.arm.ldrex.p0i32(i32*) nounwind readonl
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intrinsics-memory-barrier.ll 6 call void @llvm.arm.dmb(i32 3) ; CHECK: dmb osh
7 call void @llvm.arm.dsb(i32 7) ; CHECK: dsb nsh
8 call void @llvm.arm.isb(i32 15) ; CHECK: isb sy
19 call void @llvm.arm.dmb(i32 15) ; CHECK: dmb sy
32 call void @llvm.arm.dsb(i32 15) ; CHECK: dsb sy
45 call void @llvm.arm.isb(i32 15) ; CHECK: isb sy
53 declare void @llvm.arm.dmb(i32)
54 declare void @llvm.arm.dsb(i32)
55 declare void @llvm.arm.isb(i32)
2010-05-18-PostIndexBug.ll 1 ; RUN: llc < %s -mtriple=armv7-apple-darwin | FileCheck %s -check-prefix=ARM
9 ; ARM-LABEL: t:
10 ; ARM-DAG: mov r[[ADDR:[0-9]+]], #8
11 ; ARM-DAG: mov [[VAL:r[0-9]+]], #0
12 ; ARM: str [[VAL]], [r[[ADDR]]], r0
fast-isel-binary.ll 1 ; RUN: llc < %s -O0 -fast-isel-abort=1 -verify-machineinstrs -relocation-model=dynamic-no-pic -mtriple=armv7-apple-ios | FileCheck %s --check-prefix=ARM
2 ; RUN: llc < %s -O0 -fast-isel-abort=1 -verify-machineinstrs -relocation-model=dynamic-no-pic -mtriple=armv7-linux-gnueabi | FileCheck %s --check-prefix=ARM
9 ; ARM: add_i1
13 ; ARM: add r0, r0, r1
21 ; ARM: add_i8
25 ; ARM: add r0, r0, r1
33 ; ARM: add_i16
37 ; ARM: add r0, r0, r1
47 ; ARM: or_i1
51 ; ARM: orr r0, r0, r
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fsubs.ll 1 ; RUN: llc -mtriple=arm-eabi -mattr=+vfp2 %s -o - \
4 ; RUN: llc -mtriple=arm-eabi -mcpu=cortex-a8 %s -o - \
7 ; RUN: llc -mtriple=arm-eabi -mcpu=cortex-a8 --enable-unsafe-fp-math %s -o - \
10 ; RUN: llc -mtriple=arm-darwin -mcpu=cortex-a8 %s -o - \
13 ; RUN: llc -mtriple=arm-eabi -mattr=+neon %s -o - \
  /prebuilts/ndk/8/sources/cxx-stl/gnu-libstdc++/4.6/libs/armeabi-v7a/thumb/
libgnustl_static.a     [all...]
  /prebuilts/ndk/9/sources/cxx-stl/gnu-libstdc++/4.7/libs/armeabi-v7a/thumb/
libgnustl_static.a     [all...]
  /external/libunwind/android/
conf_arm.sh 4 echo "In order for this script to function, please choose an arm target"
9 arm_cc="${ANDROID_TOOLCHAIN}/arm-linux-androideabi-gcc"
10 arm_cpp="${ANDROID_TOOLCHAIN}/arm-linux-androideabi-g++"
24 "-isystem ${ANDROID_BUILD_TOP}/bionic/libc/arch-arm/include"
28 "-isystem ${ANDROID_BUILD_TOP}/bionic/libc/kernel/uapi/asm-arm"
30 "-isystem ${ANDROID_BUILD_TOP}/bionic/libm/include/arm"
32 "-include ${ANDROID_BUILD_TOP}/build/core/combo/include/arch/linux-arm/AndroidConfig.h"
33 "-I ${ANDROID_BUILD_TOP}/build/core/combo/include/arch/linux-arm/"
66 --host=arm
  /prebuilts/ndk/9/sources/cxx-stl/EH/gabi++/libs/armeabi/
libgabi++_static.a 38 ELF((4(???/?????0??@-?0??0??@??0???????????????@-?@?????????????????????N10__cxxabiv117__array_type_infoEGCC: (GNU) 4.6 20120106 (prerelease)A,aeabi"5TE ,.symtab.strtab.shstrtab.text.data.bss.ARM.extab.text._ZNK10__cxxabiv117__array_type_info9can_catchEPKNS_16__shim_type_infoERPv.rel.ARM.exidx.text._ZNK10__cxxabiv117__array_type_info9can_catchEPKNS_16__shim_type_infoERPv.rel.text._ZN10__cxxabiv117__array_type_infoD2Ev.ARM.extab.text._ZN10__cxxabiv117__array_type_infoD2Ev.rel.ARM.exidx.text._ZN10__cxxabiv117__array_type_infoD2Ev.rel.text._ZN10__cxxabiv117__array_type_infoD0Ev.ARM.extab.text._ZN10__cxxabiv117__array_type_infoD0Ev.rel.ARM.exidx.text._ZN10__cxxabiv117__array_type_infoD0Ev.rodata._ZTSN10__cxxabiv117__array_type_infoE.rel.data.rel.ro._ZTVN10__cxxabiv117__array_type_infoE.rel.data.rel.ro._ZTIN10__cxxabiv117__array_type_infoE.comment.note.GNU-stack.ARM.attributes4!4'464,<?p?<? 0 D(? @ lPp?lL P  ?t? `  ???p?? ? p *?$\?X ? ?? ? ? ?0?&?
62 ELF(4(@-???????@???????? ?????? ??????????@-???????@???????? ?????? ??????????GCC: (GNU) 4.6 20120106 (prerelease)A,aeabi"5TE ,.symtab.strtab.shstrtab.text.data.bss.rel.text.__cxa_bad_cast.ARM.extab.text.__cxa_bad_cast.rel.ARM.exidx.text.__cxa_bad_cast.rel.text.__cxa_bad_typeid.ARM.extab.text.__cxa_bad_typeid.rel.ARM.exidx.text.__cxa_bad_typeid.comment.note.GNU-stack.ARM.att (…)
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  /prebuilts/ndk/9/sources/cxx-stl/EH/gabi++/libs/armeabi/thumb/
libgabi++_static.a 20 ????????? ???? ??F????N10__cxxabiv117__array_type_infoEGCC: (GNU) 4.6 20120106 (prerelease)A,aeabi"5TE ,.symtab.strtab.shstrtab.text.data.bss.ARM.extab.text._ZNK10__cxxabiv117__array_type_info9can_catchEPKNS_16__shim_type_infoERPv.rel.ARM.exidx.text._ZNK10__cxxabiv117__array_type_info9can_catchEPKNS_16__shim_type_infoERPv.rel.text._ZN10__cxxabiv117__array_type_infoD2Ev.ARM.extab.text._ZN10__cxxabiv117__array_type_infoD2Ev.rel.ARM.exidx.text._ZN10__cxxabiv117__array_type_infoD2Ev.rel.text._ZN10__cxxabiv117__array_type_infoD0Ev.ARM.extab.text._ZN10__cxxabiv117__array_type_infoD0Ev.rel.ARM.exidx.text._ZN10__cxxabiv117__array_type_infoD0Ev.rodata._ZTSN10__cxxabiv117__array_type_infoE.rel.data.rel.ro._ZTVN10__cxxabiv117__array_type_infoE.rel.data.rel.ro._ZTIN10__cxxabiv117__array_type_infoE.comment.note.GNU-stack.ARM.attributes4!4'464,8?p?8?  @? XPp?XL 0  ?`? @  ?t?p?t ? P *|$\?X ` ?? ? ? ?0?&???p?-??? 0 ???
51 ????GCC: (GNU) 4.6 20120106 (prerelease)A,aeabi"5TE ,.symtab.strtab.shstrtab.text.data.bss.rel.text.__cxa_bad_cast.ARM.extab.text.__cxa_bad_cast.rel.ARM.exidx.text.__cxa_bad_cast.rel.text.__cxa_bad_typeid.ARM.extab.text.__cxa_bad_typeid.rel.ARM.exidx.text.__cxa_bad_typeid.comment.note.GNU-stack.ARM.att (…)
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  /prebuilts/ndk/9/sources/cxx-stl/EH/gabi++/libs/armeabi-v7a/
libgabi++_static.a 45 ,.symtab.strtab.shstrtab.text.data.bss.ARM.extab.text._ZNK10__cxxabiv117__array_type_info9can_catchEPKNS_16__shim_type_infoERPv.rel.ARM.exidx.text._ZNK10__cxxabiv117__array_type_info9can_catchEPKNS_16__shim_type_infoERPv.rel.text._ZN10__cxxabiv117__array_type_infoD2Ev.ARM.extab.text._ZN10__cxxabiv117__array_type_infoD2Ev.rel.ARM.exidx.text._ZN10__cxxabiv117__array_type_infoD2Ev.rel.text._ZN10__cxxabiv117__array_type_infoD0Ev.ARM.extab.text._ZN10__cxxabiv117__array_type_infoD0Ev.rel.ARM.exidx.text._ZN10__cxxabiv117__array_type_infoD0Ev.rodata._ZTSN10__cxxabiv117__array_type_infoE.rel.data.rel.ro._ZTVN10__cxxabiv117__array_type_infoE.rel.data.rel.ro._ZTIN10__cxxabiv117__array_type_infoE.comment.note.GNU-stack.ARM.attributes4!4'464,<?p?<? 4 D(? D lPp?lL T  ?t? d  ???p?? ? t *?$\?X ? ?? ? ? ?0?&?
73 ,.symtab.strtab.shstrtab.text.data.bss.rel.text.__cxa_bad_cast.ARM.extab.text.__cxa_bad_cast.rel.ARM.exidx.text.__cxa_bad_cast.rel.text.__cxa_bad_typeid.ARM.extab.text.__cxa_bad_typeid.rel.ARM.exidx.text.__cxa_bad_typeid.comment.note.GNU-stack.ARM.att (…)
    [all...]
  /prebuilts/ndk/9/sources/cxx-stl/EH/gabi++/libs/armeabi-v7a/thumb/
libgabi++_static.a 26 ,.symtab.strtab.shstrtab.text.data.bss.ARM.extab.text._ZNK10__cxxabiv117__array_type_info9can_catchEPKNS_16__shim_type_infoERPv.rel.ARM.exidx.text._ZNK10__cxxabiv117__array_type_info9can_catchEPKNS_16__shim_type_infoERPv.rel.text._ZN10__cxxabiv117__array_type_infoD2Ev.ARM.extab.text._ZN10__cxxabiv117__array_type_infoD2Ev.rel.ARM.exidx.text._ZN10__cxxabiv117__array_type_infoD2Ev.rel.text._ZN10__cxxabiv117__array_type_infoD0Ev.ARM.extab.text._ZN10__cxxabiv117__array_type_infoD0Ev.rel.ARM.exidx.text._ZN10__cxxabiv117__array_type_infoD0Ev.rodata._ZTSN10__cxxabiv117__array_type_infoE.rel.data.rel.ro._ZTVN10__cxxabiv117__array_type_infoE.rel.data.rel.ro._ZTIN10__cxxabiv117__array_type_infoE.comment.note.GNU-stack.ARM.attributes4!4'464,8?p?8?  @? $ XPp?XL 4  ?`? D  ?t?p?t ? T *|$\?X d ?? ? ? ?0?&???p?3??? 4 ???
55 ,.symtab.strtab.shstrtab.text.data.bss.rel.text.__cxa_bad_cast.ARM.extab.text.__cxa_bad_cast.rel.ARM.exidx.text.__cxa_bad_cast.rel.text.__cxa_bad_typeid.ARM.extab.text.__cxa_bad_typeid.rel.ARM.exidx.text.__cxa_bad_typeid.comment.note.GNU-stack.ARM.att (…)
    [all...]
  /prebuilts/ndk/9/sources/cxx-stl/gnu-libstdc++/4.9/libs/armeabi/
libgnustl_static.a     [all...]
  /external/clang/test/CodeGen/
arm-neon-misc.c 1 // REQUIRES: arm-registered-target
17 // CHECK: call <2 x i64> @llvm.arm.neon.vld1.v2i64
21 // CHECK: call void @llvm.arm.neon.vst1.v1i64
27 // CHECK: call <2 x i64> @llvm.arm.neon.vld1.v2i64
30 // CHECK: call <1 x i64> @llvm.arm.neon.vld1.v1i64
exceptions.c 2 // RUN: %clang_cc1 -triple armv7-apple-unknown -emit-llvm -o - %s -fexceptions -fsjlj-exceptions -fblocks | FileCheck %s -check-prefix=CHECK-ARM
9 // CHECK-ARM-LABEL: define arm_aapcscc void @test1()
14 // CHECK-ARM: invoke arm_aapcscc void @test1_helper(
19 // CHECK-ARM: landingpad { i8*, i32 } personality i8* bitcast (i32 (...)* @__gcc_personality_sj0 to i8*)
20 // CHECK-ARM-NEXT: cleanup
transparent-union.c 3 // RUN: %clang_cc1 -Werror -triple armv7-linux -emit-llvm -o - %s | FileCheck %s --check-prefix=ARM
18 // ARM-LABEL: define arm_aapcscc void @f1_0(i32* %a0)
19 // ARM: call arm_aapcscc void @f0(i8* %{{.*}})
20 // ARM: call arm_aapcscc void %{{.*}}(i8* %{{[a-z0-9]*}})
21 // ARM: }
  /external/llvm/lib/Target/ARM/TargetInfo/
ARMTargetInfo.cpp 1 //===-- ARMTargetInfo.cpp - ARM Target Implementation ---------------------===//
19 RegisterTarget<Triple::arm, /*HasJIT=*/true>
20 X(TheARMLETarget, "arm", "ARM");
22 Y(TheARMBETarget, "armeb", "ARM (big endian)");
  /external/llvm/test/MC/ARM/
directive-arch-armv2.s 3 @ This test case will check the default .ARM.attributes value for the
6 @ RUN: llvm-mc -triple arm-eabi -filetype asm %s \
8 @ RUN: llvm-mc -triple arm-eabi -filetype obj %s \
9 @ RUN: | llvm-readobj -arm-attributes | FileCheck %s -check-prefix CHECK-ATTR
23 @ CHECK-ATTR: Description: ARM v4
directive-arch-armv2a.s 3 @ This test case will check the default .ARM.attributes value for the
6 @ RUN: llvm-mc -triple arm-eabi -filetype asm %s \
8 @ RUN: llvm-mc -triple arm-eabi -filetype obj %s \
9 @ RUN: | llvm-readobj -arm-attributes | FileCheck %s -check-prefix CHECK-ATTR
23 @ CHECK-ATTR: Description: ARM v4
directive-arch-armv3.s 3 @ This test case will check the default .ARM.attributes value for the
6 @ RUN: llvm-mc -triple arm-eabi -filetype asm %s \
8 @ RUN: llvm-mc -triple arm-eabi -filetype obj %s \
9 @ RUN: | llvm-readobj -arm-attributes | FileCheck %s -check-prefix CHECK-ATTR
23 @ CHECK-ATTR: Description: ARM v4
directive-arch-armv3m.s 3 @ This test case will check the default .ARM.attributes value for the
6 @ RUN: llvm-mc -triple arm-eabi -filetype asm %s \
8 @ RUN: llvm-mc -triple arm-eabi -filetype obj %s \
9 @ RUN: | llvm-readobj -arm-attributes | FileCheck %s -check-prefix CHECK-ATTR
23 @ CHECK-ATTR: Description: ARM v4
directive-arch-armv4.s 3 @ This test case will check the default .ARM.attributes value for the
6 @ RUN: llvm-mc -triple arm-eabi -filetype asm %s \
8 @ RUN: llvm-mc -triple arm-eabi -filetype obj %s \
9 @ RUN: | llvm-readobj -arm-attributes | FileCheck %s -check-prefix CHECK-ATTR
23 @ CHECK-ATTR: Description: ARM v4
directive-arch-armv4t.s 3 @ This test case will check the default .ARM.attributes value for the
6 @ RUN: llvm-mc -triple arm-eabi -filetype asm %s \
8 @ RUN: llvm-mc -triple arm-eabi -filetype obj %s \
9 @ RUN: | llvm-readobj -arm-attributes | FileCheck %s -check-prefix CHECK-ATTR
23 @ CHECK-ATTR: Description: ARM v4T
directive-arch-armv5.s 3 @ This test case will check the default .ARM.attributes value for the
6 @ RUN: llvm-mc -triple arm-eabi -filetype asm %s \
8 @ RUN: llvm-mc -triple arm-eabi -filetype obj %s \
9 @ RUN: | llvm-readobj -arm-attributes | FileCheck %s -check-prefix CHECK-ATTR
23 @ CHECK-ATTR: Description: ARM v5T
directive-arch-armv5t.s 3 @ This test case will check the default .ARM.attributes value for the
6 @ RUN: llvm-mc -triple arm-eabi -filetype asm %s \
8 @ RUN: llvm-mc -triple arm-eabi -filetype obj %s \
9 @ RUN: | llvm-readobj -arm-attributes | FileCheck %s -check-prefix CHECK-ATTR
23 @ CHECK-ATTR: Description: ARM v5T

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