| /external/llvm/test/ExecutionEngine/OrcMCJIT/ |
| 2002-12-16-ArgTest.ll | 8 bb0:
15 bb0:
22 bb2: ; preds = %bb2, %bb0
23 %cann-indvar = phi i32 [ 0, %bb0 ], [ %add1-indvar, %bb2 ] ; <i32> [#uses=2]
33 bb3: ; preds = %bb2, %bb0
|
| /external/llvm/test/Transforms/ADCE/ |
| 2002-05-23-ZeroArgPHITest.ll | 2 ; left is the store instruction in BB0. The problem this testcase was running
12 bb0:
17 bb1: ; preds = %bb0
|
| 2002-07-17-PHIAssertion.ll | 9 bb0:
12 bb2: ; preds = %bb6, %bb0
13 %reg128 = phi i32 [ %reg130, %bb6 ], [ 0, %bb0 ] ; <i32> [#uses=2]
|
| /external/llvm/test/Transforms/SimplifyCFG/ |
| ForwardSwitchConditionToPHI.ll | 12 i32 0, label %sw.bb0
18 sw.bb0: ; preds = %entry
34 %retval.0 = phi i32 [ 4, %sw.bb4 ], [ 3, %sw.bb3 ], [ 2, %sw.bb2 ], [ 1, %sw.bb1 ], [ 0, %sw.bb0 ]
|
| indirectbr.ll | 6 ; CHECK: indirectbr i8* %t, [label %BB0, label %BB1, label %BB2]
7 ; CHECK: %x = phi i32 [ 0, %BB0 ], [ 1, %entry ]
16 store i8* blockaddress(@indbrtest0, %BB0), i8** %P
21 indirectbr i8* %t, [label %BB0, label %BB1, label %BB2, label %BB0, label %BB1, label %BB2]
22 BB0:
26 %x = phi i32 [ 0, %BB0 ], [ 1, %entry ], [ 1, %entry ]
39 ; CHECK: br label %BB0
43 store i8* blockaddress(@indbrtest1, %BB0), i8** %P
46 indirectbr i8* %t, [label %BB0, label %BB0
[all...] |
| /external/llvm/test/Assembler/ |
| 2002-08-22-DominanceProblem.ll | 8 BB0:
|
| /external/llvm/test/CodeGen/Generic/ |
| 2002-04-16-StackFrameSizeAlignment.ll | 9 bb0:
|
| badCallArgLRLLVM.ll | 15 bb0:
24 bb2: ; preds = %bb1, %bb0
|
| /external/llvm/test/CodeGen/X86/ |
| eh-label.ll | 7 bb0:
|
| exception-label.ll | 12 bb0:
|
| switch-jump-table.ll | 18 i32 0, label %bb0
25 bb0:
|
| win32-pic-jumptable.ll | 18 bb0:
34 %y = phi i32 [ 0, %bb0 ], [ 1, %bb1 ], [ 2, %bb2 ], [ 3, %bb3 ], [ 4, %bb4 ]
|
| /external/llvm/test/Feature/ |
| casttest.ll | 6 bb0:
|
| /external/llvm/test/Transforms/Inline/ |
| switch.ll | 5 i32 0, label %sw.bb0
20 sw.bb0:
|
| /external/llvm/test/Transforms/GVN/ |
| edge.ll | 5 bb0:
11 %cond = phi i32 [ %x, %bb0 ], [ 0, %bb1 ]
20 bb0:
26 %cond = phi i32 [ %x, %bb0 ], [ 0, %bb1 ]
35 bb0:
40 %cond = phi i32 [ %x, %bb0 ], [ 0, %bb1 ]
50 bb0:
|
| /external/llvm/test/CodeGen/Mips/ |
| atomic.ll | 26 ; ALL: $[[BB0:[A-Z_0-9]+]]:
30 ; NOT-MICROMIPS: beqz $[[R2]], $[[BB0]]
31 ; MICROMIPS: beqzc $[[R2]], $[[BB0]]
44 ; ALL: $[[BB0:[A-Z_0-9]+]]:
49 ; NOT-MICROMIPS: beqz $[[R2]], $[[BB0]]
50 ; MICROMIPS: beqzc $[[R2]], $[[BB0]]
66 ; ALL: $[[BB0:[A-Z_0-9]+]]:
69 ; NOT-MICROMIPS: beqz $[[R2]], $[[BB0]]
70 ; MICROMIPS: beqzc $[[R2]], $[[BB0]]
87 ; ALL: $[[BB0:[A-Z_0-9]+]]
[all...] |
| octeon.ll | 94 ; OCTEON: bbit0 $4, 3, $[[BB0:BB[0-9_]+]]
96 ; MIPS64: bnez $[[T0]], $[[BB0:BB[0-9_]+]]
110 ; OCTEON: bbit032 $4, 3, $[[BB0:BB[0-9_]+]]
114 ; MIPS64: bnez $[[T2]], $[[BB0:BB[0-9_]+]]
128 ; OCTEON: bbit1 $4, 3, $[[BB0:BB[0-9_]+]]
130 ; MIPS64: beqz $[[T0]], $[[BB0:BB[0-9_]+]]
144 ; OCTEON: bbit132 $4, 3, $[[BB0:BB[0-9_]+]]
148 ; MIPS64: beqz $[[T2]], $[[BB0:BB[0-9_]+]]
|
| longbranch.ll | 34 ; CHECK: beqz $4, $[[BB0:BB[0-9_]+]]
39 ; CHECK: $[[BB0]]:
52 ; O32: bnez $4, $[[BB0:BB[0-9_]+]]
67 ; O32: $[[BB0]]:
79 ; N64: bnez $4, $[[BB0:BB[0-9_]+]]
95 ; N64: $[[BB0]]:
109 ; MICROMIPS: bnez $4, $[[BB0:BB[0-9_]+]]
124 ; MICROMIPS: $[[BB0]]:
138 ; NACL: bnez $4, $[[BB0:BB[0-9_]+]]
154 ; NACL: $[[BB0]]
[all...] |
| /external/llvm/test/Transforms/SCCP/ |
| undef-resolve.ll | 46 bb0.us: ; preds = %control.us
49 ; CHECK: control.us: ; preds = %bb0.us, %control.outer.us
52 control.us: ; preds = %bb0.us, %control.outer.us
53 %switchCond.0.us = phi i32 [ %A.0.ph.us, %bb0.us ], [ %switchCond.0.ph.us, %control.outer.us ] ; <i32> [#uses=2]
55 i32 0, label %bb0.us
75 control: ; preds = %bb0, %control.outer
76 %switchCond.0 = phi i32 [ %A.0.ph, %bb0 ], [ %switchCond.0.ph, %control.outer ] ; <i32> [#uses=2]
78 i32 0, label %bb0
98 bb0: ; preds = %control
|
| /external/llvm/test/Transforms/InstCombine/ |
| phi.ll | 8 BB0:
13 %B = phi i32 [ %A, %BB0 ]
24 BB0:
32 %B = phi i32 [ %A, %BB0 ], [ %A, %BB1 ]
40 BB0:
45 %B = phi i32 [ %A, %BB0 ], [ %B, %Loop ]
56 BB0:
73 BB0:
76 Loop: ; preds = %Loop, %BB0
78 %B = phi i32 [ %A, %BB0 ], [ undef, %Loop ]
[all...] |
| /external/llvm/test/CodeGen/Mips/llvm-ir/ |
| select.ll | 38 ; M2-M3: bnez $[[T0]], $[[BB0:BB[0-9_]+]]
41 ; M2-M3: $[[BB0]]:
63 ; M2-M3: bnez $[[T0]], $[[BB0:BB[0-9_]+]]
66 ; M2-M3: $[[BB0]]:
88 ; M2-M3: bnez $[[T0]], $[[BB0:BB[0-9_]+]]
91 ; M2-M3: $[[BB0]]:
113 ; M2: bnez $[[T0]], $[[BB0:BB[0-9_]+]]
116 ; M2: $[[BB0]]:
143 ; M3: bnez $[[T0]], $[[BB0:BB[0-9_]+]]
146 ; M3: $[[BB0]]
[all...] |
| /external/llvm/test/Transforms/IndVarSimplify/ |
| udiv-invariant-but-traps.ll | 6 bb0:
|
| /external/llvm/test/Transforms/LowerSwitch/ |
| fold-popular-case-to-unreachable-default.ll | 14 i32 1, label %bb0
19 bb0:
47 i64 -9223372036854775808, label %bb0
54 bb0:
|
| /external/llvm/test/Transforms/Reassociate/ |
| looptest.ll | 23 bb0:
26 bb2: ; preds = %bb6, %bb0
27 %reg115 = phi i32 [ %reg120, %bb6 ], [ 0, %bb0 ] ; <i32> [#uses=2]
49 bb7: ; preds = %bb6, %bb0
|
| /external/llvm/test/Transforms/LoopIdiom/ |
| crash.ll | 8 bb0:
14 %storemerge4226 = phi i64 [ 0, %bb0 ], [ %inc139, %bb1 ]
|
