| /prebuilts/ndk/5/sources/cxx-stl/gnu-libstdc++/include/ |
| unordered_set | 45 #include <bits/stl_algobase.h>
46 #include <bits/allocator.h>
47 #include <bits/stl_function.h> // equal_to, _Identity, _Select1st
48 #include <bits/stringfwd.h>
49 #include <bits/functional_hash.h>
50 #include <bits/hashtable.h>
|
| /prebuilts/ndk/6/sources/cxx-stl/gnu-libstdc++/include/ |
| unordered_map | 45 #include <bits/stl_algobase.h>
46 #include <bits/allocator.h>
47 #include <bits/stl_function.h> // equal_to, _Identity, _Select1st
48 #include <bits/stringfwd.h>
49 #include <bits/functional_hash.h>
50 #include <bits/hashtable.h>
|
| unordered_set | 45 #include <bits/stl_algobase.h>
46 #include <bits/allocator.h>
47 #include <bits/stl_function.h> // equal_to, _Identity, _Select1st
48 #include <bits/stringfwd.h>
49 #include <bits/functional_hash.h>
50 #include <bits/hashtable.h>
|
| /prebuilts/ndk/7/sources/cxx-stl/gnu-libstdc++/include/ |
| unordered_map | 45 #include <bits/stl_algobase.h>
46 #include <bits/allocator.h>
47 #include <bits/stl_function.h> // equal_to, _Identity, _Select1st
48 #include <bits/stringfwd.h>
49 #include <bits/functional_hash.h>
50 #include <bits/hashtable.h>
|
| unordered_set | 45 #include <bits/stl_algobase.h>
46 #include <bits/allocator.h>
47 #include <bits/stl_function.h> // equal_to, _Identity, _Select1st
48 #include <bits/stringfwd.h>
49 #include <bits/functional_hash.h>
50 #include <bits/hashtable.h>
|
| /prebuilts/ndk/8/sources/cxx-stl/gnu-libstdc++/4.4.3/include/ |
| unordered_map | 45 #include <bits/stl_algobase.h>
46 #include <bits/allocator.h>
47 #include <bits/stl_function.h> // equal_to, _Identity, _Select1st
48 #include <bits/stringfwd.h>
49 #include <bits/functional_hash.h>
50 #include <bits/hashtable.h>
|
| unordered_set | 45 #include <bits/stl_algobase.h>
46 #include <bits/allocator.h>
47 #include <bits/stl_function.h> // equal_to, _Identity, _Select1st
48 #include <bits/stringfwd.h>
49 #include <bits/functional_hash.h>
50 #include <bits/hashtable.h>
|
| /external/llvm/lib/Target/X86/ |
| X86InstrFormats.td | 17 class Format<bits<7> val> {
18 bits<7> Value = val;
62 class ImmType<bits<4> val> {
63 bits<4> Value = val;
77 class FPFormat<bits<3> val> {
78 bits<3> Value = val;
91 class Domain<bits<2> val> {
92 bits<2> Value = val;
101 class CD8VForm<bits<3> val> {
102 bits<3> Value = val
[all...] |
| /external/zlib/src/contrib/infback9/ |
| infback9.c | 56 unsigned sym, bits, low, size; local
69 bits = 9;
70 inflate_table9(LENS, state.lens, 288, &(next), &(bits), state.work);
76 bits = 5;
77 inflate_table9(DISTS, state.lens, 32, &(next), &(bits), state.work);
94 printf("{%u,%u,%d}", lenfix[low].op, lenfix[low].bits,
105 printf("{%u,%u,%d}", distfix[low].op, distfix[low].bits,
120 bits = 0; \
143 hold += (unsigned long)(*next++) << bits; \
144 bits += 8;
234 unsigned bits; \/* bits in bit buffer *\/ local
[all...] |
| /bionic/libm/ |
| fpmath.h | 33 // - android uses 128 bits long doubles for LP64, so the structure and macros
47 } bits; member in union:IEEEf2bits
60 } bits; member in union:IEEEd2bits
72 } bits; member in union:IEEEl2bits
88 (a)[0] = (uint32_t)(u).bits.manl; \
89 (a)[1] = (uint32_t)((u).bits.manl >> 32); \
90 (a)[2] = (uint32_t)(u).bits.manh; \
91 (a)[3] = (uint32_t)((u).bits.manh >> 32); \
|
| /bionic/libm/upstream-freebsd/lib/msun/src/ |
| s_truncl.c | 45 int e = u.bits.exp - LDBL_MAX_EXP + 1;
50 u.e = zero[u.bits.sign];
53 if (((u.bits.manh & m) | u.bits.manl) == 0)
56 u.bits.manh &= ~m;
57 u.bits.manl = 0;
62 if ((u.bits.manl & m) == 0)
65 u.bits.manl &= ~m;
|
| /external/clang/test/CodeGen/ |
| 2007-06-18-SextAttrAggregate.c | 7 // does any extensions and remaining bits are unspecified.
9 // Win64 ABI does expect extensions for type smaller than 64bits.
|
| /external/e2fsprogs/misc/ |
| e2freefrag.h | 13 int chunkbits; /* chunk size in bits */
16 int blocksize_bits; /* fs blocksize in bits */
|
| /external/icu/icu4c/source/test/perf/unisetperf/draft/ |
| bitset.cpp | 87 BitSet(const UnicodeSet &set, UErrorCode &errorCode) : bits(shortBits), restSet(set.clone()) {
134 // Set bits for the start of the range.
151 bits=(int64_t *)uprv_malloc(bitHash->countKeys()*8);
153 if(bits!=NULL) {
154 bitHash->invert(bits);
156 bits=shortBits;
161 latin1Set[0]=(uint32_t)bits[0];
162 latin1Set[1]=(uint32_t)(bits[0]>>32);
163 latin1Set[2]=(uint32_t)bits[1];
164 latin1Set[3]=(uint32_t)(bits[1]>>32)
193 int64_t *bits; member in class:BitSet
[all...] |
| /external/iptables/extensions/ |
| libipt_NETMAP.c | 36 int bits; local
39 for (bits = 0, bm = 0x80000000; netmask & bm; netmask <<= 1)
40 bits++;
43 return bits;
71 int bits; local
76 bits = netmask2bits(a.s_addr);
77 if (bits < 0)
80 printf("/%d", bits);
|
| libxt_NETMAP.man | 8 following way: All 'one' bits in the mask are filled in from the new `address'.
9 All bits that are zero in the mask are filled in from the original address.
|
| /external/kernel-headers/original/uapi/asm-generic/ |
| ioctl.h | 4 /* ioctl command encoding: 32 bits total, command in lower 16 bits,
5 * size of the parameter structure in the lower 14 bits of the
6 * upper 16 bits.
10 * The highest 2 bits are reserved for indicating the ``access mode''.
17 * a type field. De facto, however, the top 8 bits of the lower 16
18 * bits are indeed used as a type field, so we might just as well make
49 * Direction bits, which any architecture can choose to override
|
| /external/llvm/test/CodeGen/ARM/ |
| crc32.ll | 6 %bits = zext i8 %next to i32
7 %val = call i32 @llvm.arm.crc32b(i32 %cur, i32 %bits)
14 %bits = zext i16 %next to i32
15 %val = call i32 @llvm.arm.crc32h(i32 %cur, i32 %bits)
29 %bits = zext i8 %next to i32
30 %val = call i32 @llvm.arm.crc32cb(i32 %cur, i32 %bits)
37 %bits = zext i16 %next to i32
38 %val = call i32 @llvm.arm.crc32ch(i32 %cur, i32 %bits)
|
| /external/skia/src/core/ |
| SkHalf.h | 14 // format is 1 bit sign, 5 bits exponent, 10 bits mantissa
|
| /external/squashfs-tools/squashfs-tools/ |
| swap.c | 100 #define SWAP_LE_NUM(BITS) \
101 void swap_le##BITS##_num(void *s, void *d, int n) \
104 for(i = 0; i < n; i++, s += BITS / 8, d += BITS / 8)\
105 swap_le##BITS(s, d);\
112 #define INSWAP_LE_NUM(BITS, TYPE) \
113 void inswap_le##BITS##_num(TYPE *s, int n) \
117 s[i] = inswap_le##BITS(s[i]);\
|
| /external/valgrind/memcheck/tests/ |
| clo_redzone.c | 14 // on 32 bits and 64 bits.
|
| /prebuilts/gcc/linux-x86/host/x86_64-linux-glibc2.11-4.8/sysroot/usr/include/asm/ |
| debugreg.h | 14 which debugging register was responsible for the trap. The other bits
27 bits - each field corresponds to one of the four debug registers,
31 #define DR_CONTROL_SHIFT 16 /* Skip this many bits in ctl register */
32 #define DR_CONTROL_SIZE 4 /* 4 control bits per register */
44 enabled. There are 4 fields of two bits. One bit is "local", meaning
52 #define DR_ENABLE_SIZE 2 /* 2 enable bits per register */
54 #define DR_LOCAL_ENABLE_MASK (0x55) /* Set local bits for all 4 regs */
55 #define DR_GLOBAL_ENABLE_MASK (0xAA) /* Set global bits for all 4 regs */
|
| /prebuilts/gcc/linux-x86/host/x86_64-linux-glibc2.11-4.8/sysroot/usr/include/asm-generic/ |
| ioctl.h | 4 /* ioctl command encoding: 32 bits total, command in lower 16 bits,
5 * size of the parameter structure in the lower 14 bits of the
6 * upper 16 bits.
10 * The highest 2 bits are reserved for indicating the ``access mode''.
17 * a type field. De facto, however, the top 8 bits of the lower 16
18 * bits are indeed used as a type field, so we might just as well make
49 * Direction bits, which any architecture can choose to override
|
| /prebuilts/gcc/linux-x86/host/x86_64-linux-glibc2.11-4.8/x86_64-linux/include/c++/4.8/ |
| vector | 60 #include <bits/stl_algobase.h>
61 #include <bits/allocator.h>
62 #include <bits/stl_construct.h>
63 #include <bits/stl_uninitialized.h>
64 #include <bits/stl_vector.h>
65 #include <bits/stl_bvector.h>
66 #include <bits/range_access.h>
69 # include <bits/vector.tcc>
|
| /prebuilts/gcc/linux-x86/host/x86_64-linux-glibc2.15-4.8/sysroot/usr/include/asm-generic/ |
| ioctl.h | 4 /* ioctl command encoding: 32 bits total, command in lower 16 bits,
5 * size of the parameter structure in the lower 14 bits of the
6 * upper 16 bits.
10 * The highest 2 bits are reserved for indicating the ``access mode''.
17 * a type field. De facto, however, the top 8 bits of the lower 16
18 * bits are indeed used as a type field, so we might just as well make
49 * Direction bits, which any architecture can choose to override
|
