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  /external/llvm/test/CodeGen/AArch64/
function-subtarget-features.ll 2 target datalayout = "e-m:e-i64:64-i128:128-n32:64-S128"
arm64-dagcombiner-load-slicing.ll 82 %0 = bitcast %class.Complex_long* %arrayidx to i128*
83 %1 = load i128, i128* %0, align 4
84 %t0.sroa.0.0.extract.trunc = trunc i128 %1 to i64
86 %t0.sroa.2.0.extract.shift = lshr i128 %1, 64
87 %t0.sroa.2.0.extract.trunc = trunc i128 %t0.sroa.2.0.extract.shift to i64
aarch64_tree_tests.ll 4 target datalayout = "e-m:e-i64:64-i128:128-n32:64-S128"
arm64-ands-bad-peephole.ll 5 target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"
stackmap-liveness.ll 3 target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"
tailcall-implicit-sret.ll 4 target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"
  /external/llvm/test/CodeGen/ARM/
big-endian-neon-bitconv.ll 189 define void @conv_i128_to_v16i8( i128 %val, <16 x i8>* %store ) {
192 %v = bitcast i128 %val to <16 x i8>
205 %f = bitcast <16 x i8> %a to i128
206 call void @conv_i128_to_v16i8( i128 %f, <16 x i8>* %store )
210 define void @conv_i128_to_v8i16( i128 %val, <8 x i16>* %store ) {
213 %v = bitcast i128 %val to <8 x i16>
226 %f = bitcast <8 x i16> %a to i128
227 call void @conv_i128_to_v8i16( i128 %f, <8 x i16>* %store )
231 define void @conv_i128_to_v4i32( i128 %val, <4 x i32>* %store ) {
234 %v = bitcast i128 %val to <4 x i32
    [all...]
  /external/llvm/test/DebugInfo/AArch64/
big-endian.ll 3 target datalayout = "E-m:e-i64:64-i128:128-n32:64-S128"
  /external/llvm/test/Transforms/SLPVectorizer/AArch64/
mismatched-intrinsics.ll 2 target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"
load-store-q.ll 2 target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"
  /external/llvm/test/CodeGen/X86/
peep-test-4.ll 120 define zeroext i1 @adc(i128 %x) nounwind {
121 %add = add i128 %x, 9223372036854775808
122 %cmp = icmp ult i128 %add, 18446744073709551616
131 define zeroext i1 @sbb(i128 %x, i128 %y) nounwind {
132 %sub = sub i128 %x, %y
133 %cmp = icmp sge i128 %sub, 0
2010-04-06-SSEDomainFixCrash.ll 26 %tmp22.i.i = bitcast <4 x float> %1 to i128 ; <i128> [#uses=1]
27 %tmp23.i.i = trunc i128 %tmp22.i.i to i32 ; <i32> [#uses=1]
  /external/llvm/test/CodeGen/Generic/
switch-lower.ll 7 switch i128 undef, label %exit [
8 i128 55340232221128654848, label %exit
9 i128 92233720368547758080, label %exit
10 i128 73786976294838206464, label %exit
11 i128 147573952589676412928, label %exit
  /external/llvm/test/CodeGen/Mips/llvm-ir/
add.ll 95 define signext i128 @add_i128(i128 signext %a, i128 signext %b) {
121 %r = add i128 %a, %b
122 ret i128 %r
srem.ll 128 define signext i128 @srem_i128(i128 signext %a, i128 signext %b) {
137 %r = srem i128 %a, %b
138 ret i128 %r
sub.ll 95 define signext i128 @sub_i128(i128 signext %a, i128 signext %b) {
120 %r = sub i128 %a, %b
121 ret i128 %r
lshr.ll 135 define signext i128 @lshr_i128(i128 signext %a, i128 signext %b) {
186 %r = lshr i128 %a, %b
187 ret i128 %r
sdiv.ll 133 define signext i128 @sdiv_i128(i128 signext %a, i128 signext %b) {
142 %r = sdiv i128 %a, %b
143 ret i128 %r
  /external/clang/test/CodeGen/
exprs.c 178 // PR13704: negative increment in i128 is not preserved.
185 // CHECK: add nsw i128 %{{.}}, -1
bmi2-builtins.c 51 // CHECK: mul nuw i128
  /external/clang/test/CodeGenCXX/
const-init.cpp 62 // CHECK: @PR11705 = global i128 0
66 // CHECK: @_ZZ23UnfoldableAddrLabelDiffvE1x = internal global i128 0
  /external/llvm/test/Transforms/ScalarRepl/
inline-vector.ll 35 %tmp3.i = zext i64 %tmp2.i to i128
36 %tmp10.i = bitcast i128 %tmp3.i to <4 x float>
  /external/llvm/test/Transforms/LoopVectorize/AArch64/
sdiv-pow2.ll 2 target datalayout = "e-m:e-i64:64-i128:128-n32:64-S128"
  /frameworks/av/media/mtp/
MtpProperty.h 36 int128_t i128; member in union:android::MtpPropertyValue::__anon22412
  /external/llvm/test/Transforms/InstCombine/
bitcast-bigendian.ll 35 %tmp = bitcast <2 x i64> %B to i128
36 %tmp1 = lshr i128 %tmp, 64
37 %tmp2 = trunc i128 %tmp1 to i32

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