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  /art/runtime/
dex_instruction_utils.h 35 // Dex instruction memory access types correspond to the ordering of GET/PUT instructions;
52 constexpr bool IsInstructionReturn(Instruction::Code opcode) {
53 return Instruction::RETURN_VOID <= opcode && opcode <= Instruction::RETURN_OBJECT;
56 constexpr bool IsInstructionInvoke(Instruction::Code opcode) {
57 return Instruction::INVOKE_VIRTUAL <= opcode && opcode <= Instruction::INVOKE_INTERFACE_RANGE &&
58 opcode != Instruction::RETURN_VOID_NO_BARRIER;
61 constexpr bool IsInstructionQuickInvoke(Instruction::Code opcode) {
62 return opcode == Instruction::INVOKE_VIRTUAL_QUICK |
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  /art/compiler/dex/quick/
quick_compiler.cc 62 // Additional disabled optimizations (over generally disabled) per instruction set.
106 // Supported shorty types per instruction set. null means that all are available.
138 Instruction::NOP,
139 Instruction::MOVE,
140 Instruction::MOVE_FROM16,
141 Instruction::MOVE_16,
142 Instruction::MOVE_WIDE,
143 Instruction::MOVE_WIDE_FROM16,
144 Instruction::MOVE_WIDE_16,
145 Instruction::MOVE_OBJECT
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  /external/v8/src/arm64/
disasm-arm64.h 27 #define DECLARE(A) void Visit##A(Instruction* instr);
32 virtual void ProcessOutput(Instruction* instr);
34 void Format(Instruction* instr, const char* mnemonic, const char* format);
35 void Substitute(Instruction* instr, const char* string);
36 int SubstituteField(Instruction* instr, const char* format);
37 int SubstituteRegisterField(Instruction* instr, const char* format);
38 int SubstituteImmediateField(Instruction* instr, const char* format);
39 int SubstituteLiteralField(Instruction* instr, const char* format);
40 int SubstituteBitfieldImmediateField(Instruction* instr, const char* format);
41 int SubstituteShiftField(Instruction* instr, const char* format)
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  /art/test/443-not-bool-inline/
info.txt 1 Regression test for optimizing, who used a wrong instruction
  /art/test/453-not-byte/
info.txt 1 Regression test for optimizing, which was expecting int only on a not-int instruction.
  /art/test/475-simplify-mul-zero/
info.txt 1 Regression check for optimizing simplify instruction pass.
  /external/llvm/lib/Target/XCore/
README.txt 4 * Instruction encodings
  /external/smali/dexlib2/src/main/java/org/jf/dexlib2/builder/
MutableMethodImplementation.java 41 import org.jf.dexlib2.builder.instruction.*;
46 import org.jf.dexlib2.iface.instruction.Instruction;
47 import org.jf.dexlib2.iface.instruction.SwitchElement;
48 import org.jf.dexlib2.iface.instruction.formats.*;
68 for (Instruction instruction: methodImplementation.getInstructions()) {
69 codeAddress += instruction.getCodeUnits();
84 for (final Instruction instruction: methodImplementation.getInstructions())
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  /external/llvm/test/MC/ARM/
invalid-fp-armv8.s 11 @ V8: error: invalid instruction
13 @ V8: error: invalid instruction
15 @ V8: error: invalid instruction
17 @ V8: error: invalid instruction
19 @ V8: error: invalid instruction
21 @ V8: error: invalid instruction
23 @ V8: error: invalid instruction
25 @ V8: error: invalid instruction
27 @ V8: error: invalid instruction
29 @ V8: error: invalid instruction
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invalid-neon-v8.s 4 @ CHECK: error: invalid operand for instruction
6 @ CHECK: error: invalid operand for instruction
8 @ CHECK: error: instruction 'vmaxnm' is not predicable, but condition code specified
11 @ CHECK: error: instruction requires: FPARMv8
13 @ CHECK: error: invalid operand for instruction
15 @ CHECK: error: invalid operand for instruction
17 @ CHECK: error: instruction 'vcvtp' is not predicable, but condition code specified
20 @ CHECK: error: invalid operand for instruction
22 @ CHECK: error: invalid operand for instruction
24 @ CHECK: error: invalid operand for instruction
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directive-arch_extension-fp.s 20 @ CHECK-V7: error: instruction requires: FPARMv8
23 @ CHECK-V7: error: instruction requires: FPARMv8
25 @ CHECK-V7: error: instruction requires: FPARMv8
27 @ CHECK-V7: error: instruction requires: FPARMv8
29 @ CHECK-V7: error: instruction requires: FPARMv8
31 @ CHECK-V7: error: instruction requires: FPARMv8
33 @ CHECK-V7: error: instruction requires: FPARMv8
36 @ CHECK-V7: error: instruction requires: FPARMv8
38 @ CHECK-V7: error: instruction requires: FPARMv8
40 @ CHECK-V7: error: instruction requires: FPARMv
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directive-arch_extension-crypto.s 20 @ CHECK-V7: error: instruction requires: crypto armv8
23 @ CHECK-V7: error: instruction requires: crypto armv8
25 @ CHECK-V7: error: instruction requires: crypto armv8
27 @ CHECK-V7: error: instruction requires: crypto armv8
29 @ CHECK-V7: error: instruction requires: crypto armv8
32 @ CHECK-V7: error: instruction requires: crypto armv8
34 @ CHECK-V7: error: instruction requires: crypto armv8
36 @ CHECK-V7: error: instruction requires: crypto armv8
39 @ CHECK-V7: error: instruction requires: crypto armv8
41 @ CHECK-V7: error: instruction requires: crypto armv
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  /art/compiler/optimizing/
builder.cc 39 * converting a DEX instruction to multiple HInstruction, and where those
40 * instructions do not die at the following instruction, but instead spans
47 void Add(HInstruction* instruction) {
49 instruction->GetBlock()->AddInstruction(temp);
51 DCHECK(temp->GetPrevious() == instruction);
54 if (instruction->GetType() == Primitive::kPrimLong
55 || instruction->GetType() == Primitive::kPrimDouble) {
74 SwitchTable(const Instruction& instruction, uint32_t dex_pc, bool sparse)
75 : instruction_(instruction), dex_pc_(dex_pc), sparse_(sparse)
320 const Instruction& instruction = *Instruction::At(code_ptr); local
369 const Instruction& instruction = *Instruction::At(code_ptr); local
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constant_folding.cc 30 void VisitAnd(HAnd* instruction) OVERRIDE;
31 void VisitMul(HMul* instruction) OVERRIDE;
32 void VisitOr(HOr* instruction) OVERRIDE;
33 void VisitRem(HRem* instruction) OVERRIDE;
34 void VisitShl(HShl* instruction) OVERRIDE;
35 void VisitShr(HShr* instruction) OVERRIDE;
36 void VisitSub(HSub* instruction) OVERRIDE;
37 void VisitUShr(HUShr* instruction) OVERRIDE;
38 void VisitXor(HXor* instruction) OVERRIDE;
44 // so that an instruction turned into a constant, used as input o
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builder.h 32 class Instruction;
82 // Analyzes the dex instruction and adds HInstruction to the graph
83 // to execute that instruction. Returns whether the instruction can
85 bool AnalyzeDexInstruction(const Instruction& instruction, uint32_t dex_pc);
102 void UpdateLocal(int register_index, HInstruction* instruction) const;
109 void Unop_12x(const Instruction& instruction, Primitive::Type type);
112 void Binop_23x(const Instruction& instruction, Primitive::Type type)
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dominator_test.cc 55 Instruction::RETURN_VOID); // Block number 1
68 Instruction::GOTO | 0x100, // Block number 1
69 Instruction::RETURN_VOID); // Block number 2
83 Instruction::GOTO | 0x100, // Block number 1
84 Instruction::GOTO | 0x100, // Block number 2
85 Instruction::RETURN_VOID); // Block number 3
100 Instruction::GOTO | 0x200, // Block number 1
101 Instruction::RETURN_VOID, // Block number 2
102 Instruction::GOTO | 0xFF00); // Block number 3
115 Instruction::GOTO_16, 3
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  /external/smali/dexlib2/src/main/java/org/jf/dexlib2/rewriter/
InstructionRewriter.java 36 import org.jf.dexlib2.iface.instruction.Instruction;
37 import org.jf.dexlib2.iface.instruction.ReferenceInstruction;
38 import org.jf.dexlib2.iface.instruction.formats.*;
46 public class InstructionRewriter implements Rewriter<Instruction> {
53 @Nonnull @Override public Instruction rewrite(@Nonnull Instruction instruction) {
54 if (instruction instanceof ReferenceInstruction) {
55 switch (instruction.getOpcode().format)
77 @Nonnull protected T instruction; field in class:InstructionRewriter.BaseRewrittenReferenceInstruction
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  /external/smali/dexlib2/src/main/java/org/jf/dexlib2/immutable/instruction/
ImmutableInstruction.java 32 package org.jf.dexlib2.immutable.instruction;
37 import org.jf.dexlib2.iface.instruction.Instruction;
38 import org.jf.dexlib2.iface.instruction.formats.*;
44 public abstract class ImmutableInstruction implements Instruction {
53 public static ImmutableInstruction of(Instruction instruction) {
54 if (instruction instanceof ImmutableInstruction) {
55 return (ImmutableInstruction)instruction;
58 switch (instruction.getOpcode().format)
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  /dalvik/dx/tests/031-bb-dead-code/
info.txt 2 dead code. There is at least one example of dead code after each instruction
3 that *doesn't* flow to the next instruction.
  /external/smali/dexlib2/src/main/java/org/jf/dexlib2/writer/
InstructionFactory.java 36 import org.jf.dexlib2.iface.instruction.Instruction;
37 import org.jf.dexlib2.iface.instruction.SwitchElement;
45 Instruction makeInstruction10t(@Nonnull Opcode opcode, int codeOffset);
46 Instruction makeInstruction10x(@Nonnull Opcode opcode);
47 Instruction makeInstruction11n(@Nonnull Opcode opcode, int registerA, int literal);
48 Instruction makeInstruction11x(@Nonnull Opcode opcode, int registerA);
49 Instruction makeInstruction12x(@Nonnull Opcode opcode, int registerA, int registerB);
50 Instruction makeInstruction20bc(@Nonnull Opcode opcode, int verificationError, @Nonnull Ref reference);
51 Instruction makeInstruction20t(@Nonnull Opcode opcode, int codeOffset)
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InstructionWriter.java 35 import org.jf.dexlib2.iface.instruction.ReferenceInstruction;
36 import org.jf.dexlib2.iface.instruction.SwitchElement;
37 import org.jf.dexlib2.iface.instruction.formats.*;
80 public void write(@Nonnull Instruction10t instruction) {
82 writer.write(instruction.getOpcode().value);
83 writer.write(instruction.getCodeOffset());
89 public void write(@Nonnull Instruction10x instruction) {
91 writer.write(instruction.getOpcode().value);
98 public void write(@Nonnull Instruction11n instruction) {
100 writer.write(instruction.getOpcode().value)
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  /art/test/475-regression-inliner-ids/
info.txt 2 instruction IDs in the caller graph
  /external/valgrind/none/tests/s390x/
op00.c 1 /* Test for invalid instruction 00. */
  /art/runtime/quick/
inline_method_analyser.cc 36 static_assert(InlineMethodAnalyser::IsInstructionIGet(Instruction::IGET), "iget type");
37 static_assert(InlineMethodAnalyser::IsInstructionIGet(Instruction::IGET_WIDE), "iget_wide type");
38 static_assert(InlineMethodAnalyser::IsInstructionIGet(Instruction::IGET_OBJECT),
40 static_assert(InlineMethodAnalyser::IsInstructionIGet(Instruction::IGET_BOOLEAN),
42 static_assert(InlineMethodAnalyser::IsInstructionIGet(Instruction::IGET_BYTE), "iget_byte type");
43 static_assert(InlineMethodAnalyser::IsInstructionIGet(Instruction::IGET_CHAR), "iget_char type");
44 static_assert(InlineMethodAnalyser::IsInstructionIGet(Instruction::IGET_SHORT), "iget_short type");
45 static_assert(InlineMethodAnalyser::IsInstructionIPut(Instruction::IPUT), "iput type");
46 static_assert(InlineMethodAnalyser::IsInstructionIPut(Instruction::IPUT_WIDE), "iput_wide type");
47 static_assert(InlineMethodAnalyser::IsInstructionIPut(Instruction::IPUT_OBJECT)
84 const Instruction* instruction = Instruction::At(code_item->insns_); local
168 const Instruction* instruction = Instruction::At(code_item->insns_); local
201 const Instruction* instruction = Instruction::At(code_item->insns_); local
264 const Instruction* instruction = Instruction::At(code_item->insns_); local
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  /external/mesa3d/src/gallium/drivers/r300/compiler/
radeon_opcodes.h 40 /** vec4 instruction: dst.c = abs(src0.c); */
43 /** vec4 instruction: dst.c = src0.c + src1.c; */
46 /** special instruction: load address register
50 /** vec4 instruction: dst.c = ceil(src0.c) */
53 /** vec4 instruction: dst.c = clamp(src0.c, src1.c, src2.c) */
56 /** vec4 instruction: dst.c = src0.c < 0.0 ? src1.c : src2.c */
59 /** vec4 instruction: dst.c = src2.c > 0.5 ? src0.c : src1.c */
62 /** scalar instruction: dst = cos(src0.x) */
65 /** special instruction: take vec4 partial derivative in X direction
69 /** special instruction: take vec4 partial derivative in Y directio
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