/dalvik/dx/src/com/android/dx/dex/code/ |
InsnFormat.java | 32 * Base class for all instruction format handlers. Instruction format 47 * dump, of the given instruction. The instruction must be of this 50 * @param insn {@code non-null;} the instruction 77 * Returns the string form of the arguments to the given instruction. 78 * The instruction must be of this instance's format. If the instruction 84 * @param insn {@code non-null;} the instruction 90 * Returns the associated comment for the given instruction, if any [all...] |
/external/dexmaker/src/dx/java/com/android/dx/dex/code/ |
InsnFormat.java | 33 * Base class for all instruction format handlers. Instruction format 48 * dump, of the given instruction. The instruction must be of this 51 * @param insn {@code non-null;} the instruction 78 * Returns the string form of the arguments to the given instruction. 79 * The instruction must be of this instance's format. If the instruction 85 * @param insn {@code non-null;} the instruction 91 * Returns the associated comment for the given instruction, if any [all...] |
/art/compiler/ |
compiler.cc | 45 * Skip compilation for pathologically large methods - either by instruction count or num vregs. 46 * Dalvik uses 16-bit uints for instruction and register counts. We'll limit to a quarter 50 LOG(INFO) << "Method exceeds compiler instruction limit: "
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/art/tools/dexfuzz/src/dexfuzz/program/mutators/ |
ValuePrinter.java | 24 import dexfuzz.rawdex.Instruction; 79 // Find an instruction whose output we wish to print. 122 Log.errorAndQuit("Requested to print output of an instruction, whose output" 154 valueCopyInsn.insn = new Instruction(); 156 valueCopyInsn.insn.info = Instruction.getOpcodeInfo(Opcode.MOVE_OBJECT_16); 158 valueCopyInsn.insn.info = Instruction.getOpcodeInfo(Opcode.MOVE_WIDE_16); 160 valueCopyInsn.insn.info = Instruction.getOpcodeInfo(Opcode.MOVE_16); 166 streamLoadInsn.insn = new Instruction(); 167 streamLoadInsn.insn.info = Instruction.getOpcodeInfo(Opcode.SGET_OBJECT); 172 invokeInsn.insn = new Instruction(); [all...] |
/dalvik/dx/src/com/android/dx/io/instructions/ |
FillArrayDataPayloadDecodedInstruction.java | 20 * A decoded Dalvik instruction which contains the payload for 21 * a {@code packed-switch} instruction. 98 throw new UnsupportedOperationException("no index in instruction");
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/external/dexmaker/ |
README | 12 It has a small, close-to-the-metal API. This API mirrors the Dalvik bytecode specification giving you tight control over the bytecode emitted. Code is generated instruction-by-instruction; you bring your own abstract syntax tree if you need one. And since it uses Dalvik's dx tool as a backend, you get efficient register allocation and regular/wide instruction selection for free.
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/external/dexmaker/src/dx/java/com/android/dx/io/instructions/ |
FillArrayDataPayloadDecodedInstruction.java | 20 * A decoded Dalvik instruction which contains the payload for 21 * a {@code packed-switch} instruction. 98 throw new UnsupportedOperationException("no index in instruction");
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/external/fio/crc/ |
crc32c-intel.c | 13 * Using hardware provided CRC32 instruction to accelerate the CRC32 disposal. 15 * CRC32 is a new instruction in Intel SSE4.2, the reference can be found at: 18 * Volume 2A: Instruction Set Reference, A-M
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/external/llvm/lib/Target/AArch64/ |
AArch64MachineCombinerPattern.h | 2 //===- AArch64 instruction pattern supported by combiner -===// 11 // This file defines instruction pattern supported by combiner 20 /// Enumeration of instruction pattern supported by machine combiner
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/external/llvm/lib/Target/Mips/MCTargetDesc/ |
MipsABIFlagsSection.h | 47 AFL_EXT_XLR = 1, // RMI Xlr instruction. 52 AFL_EXT_5900 = 6, // MIPS R5900 instruction. 53 AFL_EXT_4650 = 7, // MIPS R4650 instruction. 54 AFL_EXT_4010 = 8, // LSI R4010 instruction. 55 AFL_EXT_4100 = 9, // NEC VR4100 instruction. 56 AFL_EXT_3900 = 10, // Toshiba R3900 instruction. 57 AFL_EXT_10000 = 11, // MIPS R10000 instruction. 58 AFL_EXT_SB1 = 12, // Broadcom SB-1 instruction. 59 AFL_EXT_4111 = 13, // NEC VR4111/VR4181 instruction. 60 AFL_EXT_4120 = 14, // NEC VR4120 instruction [all...] |
/external/llvm/lib/Target/PowerPC/ |
PPCInstrInfo.h | 1 //===-- PPCInstrInfo.h - PowerPC Instruction Information --------*- C++ -*-===// 27 /// per-instruction flags. These must match the corresponding definitions in 31 // PPC970 Instruction Flags. These flags describe the characteristics of the 35 /// PPC970_First - This instruction starts a new dispatch group, so it will 39 /// PPC970_Single - This instruction starts a new dispatch group and 40 /// terminates it, so it will be the sole instruction in the group. 43 /// PPC970_Cracked - This instruction is cracked into two pieces, requiring 48 /// an instruction is issued to. 53 /// These are the various PPC970 execution unit pipelines. Each instruction 55 PPC970_Pseudo = 0 << PPC970_Shift, // Pseudo instruction [all...] |
/external/llvm/lib/Transforms/ObjCARC/ |
PtrState.h | 22 #include "llvm/IR/Instruction.h" 77 SmallPtrSet<Instruction *, 2> Calls; 81 SmallPtrSet<Instruction *, 2> ReverseInsertPts; 156 void InsertCall(Instruction *I) { RRI.Calls.insert(I); } 158 void InsertReverseInsertPt(Instruction *I) { RRI.ReverseInsertPts.insert(I); } 172 bool InitBottomUp(ARCMDKindCache &Cache, Instruction *I); 182 void HandlePotentialUse(BasicBlock *BB, Instruction *Inst, const Value *Ptr, 184 bool HandlePotentialAlterRefCount(Instruction *Inst, const Value *Ptr, 193 bool InitTopDown(ARCInstKind Kind, Instruction *I); 198 bool MatchWithRelease(ARCMDKindCache &Cache, Instruction *Release) [all...] |
/external/llvm/unittests/IR/ |
DominatorTreeTest.cpp | 37 Instruction *Y1 = BBI++; 38 Instruction *Y2 = BBI++; 39 Instruction *Y3 = BBI++; 43 Instruction *Y4 = BBI++; 47 Instruction *Y5 = BBI++; 51 Instruction *Y6 = BBI++; 52 Instruction *Y7 = BBI++; 56 Instruction *Y8 = BBI++; 57 Instruction *Y9 = BBI++; 112 // Instruction dominance in the same reachable B [all...] |
/external/ltrace/testsuite/ltrace.minor/ |
Makefile.am | 21 print-instruction-pointer.c print-instruction-pointer.exp \ 28 count-record demangle print-instruction-pointer time-record-T \
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/external/mesa3d/src/gallium/auxiliary/draw/ |
draw_pipe_aapoint.c | 164 * TGSI instruction transform callback. 166 * Upon END instruction, insert texture sampling code for antialiasing. 176 /* emit our new declarations before the first instruction */ 241 newInst.Instruction.Opcode = TGSI_OPCODE_MUL; 242 newInst.Instruction.NumDstRegs = 1; 246 newInst.Instruction.NumSrcRegs = 2; 255 newInst.Instruction.Opcode = TGSI_OPCODE_ADD; 256 newInst.Instruction.NumDstRegs = 1; 260 newInst.Instruction.NumSrcRegs = 2; 272 newInst.Instruction.Opcode = TGSI_OPCODE_RSQ [all...] |
/external/proguard/src/proguard/classfile/instruction/visitor/ |
InstructionVisitor.java | 21 package proguard.classfile.instruction.visitor; 25 import proguard.classfile.instruction.*; 30 * <code>Instruction</code> objects.
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/external/proguard/src/proguard/classfile/visitor/ |
ExceptionHandlerFilter.java | 30 * targets an instruction in the given range of offsets. 44 * @param startOffset the start of the instruction offset range. 45 * @param endOffset the end of the instruction offset range.
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ExceptionRangeFilter.java | 30 * overlaps with the given instruction range. 44 * @param startOffset the start offset of the instruction range. 45 * @param endOffset the end offset of the instruction range.
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/external/smali/dexlib2/src/main/java/org/jf/dexlib2/iface/instruction/formats/ |
Instruction11n.java | 32 package org.jf.dexlib2.iface.instruction.formats; 34 import org.jf.dexlib2.iface.instruction.NarrowLiteralInstruction; 35 import org.jf.dexlib2.iface.instruction.OneRegisterInstruction;
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Instruction20bc.java | 32 package org.jf.dexlib2.iface.instruction.formats; 34 import org.jf.dexlib2.iface.instruction.ReferenceInstruction; 35 import org.jf.dexlib2.iface.instruction.VerificationErrorInstruction;
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Instruction21c.java | 32 package org.jf.dexlib2.iface.instruction.formats; 34 import org.jf.dexlib2.iface.instruction.OneRegisterInstruction; 35 import org.jf.dexlib2.iface.instruction.ReferenceInstruction;
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Instruction21ih.java | 32 package org.jf.dexlib2.iface.instruction.formats; 34 import org.jf.dexlib2.iface.instruction.NarrowHatLiteralInstruction; 35 import org.jf.dexlib2.iface.instruction.OneRegisterInstruction;
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Instruction21lh.java | 32 package org.jf.dexlib2.iface.instruction.formats; 34 import org.jf.dexlib2.iface.instruction.LongHatLiteralInstruction; 35 import org.jf.dexlib2.iface.instruction.OneRegisterInstruction;
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Instruction21s.java | 32 package org.jf.dexlib2.iface.instruction.formats; 34 import org.jf.dexlib2.iface.instruction.NarrowLiteralInstruction; 35 import org.jf.dexlib2.iface.instruction.OneRegisterInstruction;
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Instruction21t.java | 32 package org.jf.dexlib2.iface.instruction.formats; 34 import org.jf.dexlib2.iface.instruction.OffsetInstruction; 35 import org.jf.dexlib2.iface.instruction.OneRegisterInstruction;
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