| /art/test/800-smali/smali/ |
| b_22080519.smali | 12 # This instruction will be marked runtime-throw.
|
| /art/tools/dexfuzz/src/dexfuzz/rawdex/ |
| CodeItem.java | 33 public List<Instruction> insns;
72 insns = new LinkedList<Instruction>();
80 Instruction newInsn = new Instruction();
101 for (Instruction insn : insns) {
134 // The only kind we can't encounter in an instruction.
138 List<Instruction> insnsToIncrement = insns;
148 for (Instruction insn : insnsToIncrement) {
201 + "in Instruction.incrementIndex()");
|
| /cts/tools/vm-tests-tf/src/dot/junit/opcodes/move_result/ |
| Test_move_result.java | 70 * @title move-result instruction must be immediately preceded
71 * (in the insns array) by an <invoke-kind> instruction
79 * @title move-result instruction must be immediately preceded
80 * (in actual control flow) by an <invoke-kind> instruction
|
| /cts/tools/vm-tests-tf/src/dot/junit/opcodes/move_result_wide/ |
| Test_move_result_wide.java | 70 * @title move-result-wide instruction must be immediately preceded
71 * (in the insns array) by an <invoke-kind> instruction
79 * @title move-result-wide instruction must be immediately preceded
80 * (in actual control flow) by an <invoke-kind> instruction
|
| /external/compiler-rt/test/msan/ |
| vector_select.cc | 4 // Regression test for MemorySanitizer instrumentation of a select instruction
|
| /external/google-breakpad/src/third_party/libdisasm/ |
| ia32_settings.h | 18 id_ip_reg, /* id of instruction pointer */
|
| /external/javassist/src/main/javassist/bytecode/analysis/ |
| package.html | 7 at the start of every instruction. In addition this API can be used to validate
|
| /external/javassist/src/main/javassist/bytecode/ |
| package.html | 7 bytecode instruction, and so on.
|
| /external/kernel-headers/original/uapi/asm-mips/asm/ |
| cachectl.h | 14 #define ICACHE (1<<0) /* flush instruction cache */
|
| /external/lldb/source/Plugins/Instruction/ARM/ |
| EmulationStateARM.h | 54 ReadPseudoMemory (lldb_private::EmulateInstruction *instruction,
62 WritePseudoMemory (lldb_private::EmulateInstruction *instruction,
70 ReadPseudoRegister (lldb_private::EmulateInstruction *instruction,
76 WritePseudoRegister (lldb_private::EmulateInstruction *instruction,
|
| /external/llvm/include/llvm/CodeGen/ |
| MachineInstrBundle.h | 10 // This file provide utility functions to manipulate machine instruction
22 /// finalizeBundle - Finalize a machine instruction bundle which includes
24 /// This routine adds a BUNDLE instruction to represent the bundle, it adds
27 /// instruction.
33 /// the last instruction in the bundle is not provided as an input. This is
35 /// with 'InsideBundle' marker. It returns the MBB instruction iterator that
40 /// finalizeBundles - Finalize instruction bundles in the specified
44 /// getBundleStart - Returns the first instruction in the bundle containing MI.
99 // bundled instruction with operands.
112 /// on MI, or all operands on every instruction in the bundle containing MI
[all...] |
| /external/llvm/lib/Transforms/Scalar/ |
| CorrelatedValuePropagation.cpp | 43 bool processMemAccess(Instruction *I);
144 bool CorrelatedValuePropagation::processMemAccess(Instruction *I) {
168 if (isa<Instruction>(Op0) &&
169 cast<Instruction>(Op0)->getParent() == C->getParent())
204 /// processSwitch - Simplify a switch instruction by removing cases which can
217 if (isa<Instruction>(Cond) && cast<Instruction>(Cond)->getParent() == BB)
301 Instruction *II = BI++;
303 case Instruction::Select:
306 case Instruction::PHI
[all...] |
| /external/llvm/test/CodeGen/AArch64/ |
| arm64-2011-03-21-Unaligned-Frame-Index.ll | 5 ; instruction that can handle that.
|
| /external/llvm/test/CodeGen/ARM/ |
| pic.ll | 3 ; If the relocation model is PIC, then the "bl" instruction for the function
|
| /external/llvm/test/CodeGen/PowerPC/ |
| ppc64-icbt-pwr8.ll | 1 ; Test the ICBT instruction on POWER8
|
| /external/llvm/test/CodeGen/X86/ |
| fast-isel-x32.ll | 4 ; Test that alloca addresses are materialized with the right size instruction.
|
| /external/llvm/test/MC/ARM/ |
| arm-qualifier-diagnostics.s | 9 @ CHECK: error: instruction with .n (narrow) qualifier not allowed in arm mode
|
| coproc-diag.s | 10 @ CHECK-NOT: error: invalid operand for instruction
|
| cpu-test.s | 10 // CHECK-ERROR: error: instruction requires: data-barriers
|
| diagnostics.s | 8 @ 's' bit on an instruction that can't accept it.
10 @ CHECK-ERRORS: error: instruction 'mls' can not set flags,
96 @ CHECK-ERRORS: error: invalid operand for instruction
98 @ Out of range immediates for v8 HLT instruction.
101 @CHECK-ERRORS-V8: error: invalid operand for instruction
104 @CHECK-ERRORS-V8: error: invalid operand for instruction
108 @ Illegal condition code for v8 HLT instruction.
111 @CHECK-ERRORS-V8: error: instruction 'hlt' is not predicable, but condition code specified
114 @CHECK-ERRORS-V8: error: instruction 'hlt' is not predicable, but condition code specified
126 @ CHECK-ERRORS: error: invalid operand for instruction
[all...] |
| neon-mov-vfp.s | 14 @ VFP-DAG: error: instruction requires: NEON
15 @ VFP-DAG: error: instruction requires: NEON
26 @ VFP-DAG: error: instruction requires: NEON
27 @ VFP-DAG: error: instruction requires: NEON
|
| /external/llvm/test/MC/Disassembler/ARM/ |
| thumb2-preloads.txt | 18 # MP-ERR: invalid instruction encoding
23 # MP-ERR: invalid instruction encoding
40 # MP-ERR: invalid instruction encoding
45 # MP-ERR: invalid instruction encoding
50 # V7-ERR: invalid instruction encoding
55 # V7-ERR: invalid instruction encoding
60 # V7-ERR: invalid instruction encoding
65 # V7-ERR: invalid instruction encoding
69 # NO-ERR-NOT: invalid instruction encoding
|
| /external/llvm/test/MC/Mips/mips1/ |
| valid-xfail.s | 3 # This test is set up to XPASS if any instruction generates an encoding.
|
| /external/llvm/test/Object/ARM/ |
| symbol-addr.ll | 6 ; Check that the symbol address does not include the ARM/Thumb instruction
|
| /external/llvm/test/Transforms/ConstProp/ |
| 2002-05-03-NotOperator.ll | 5 ; Fix #2: The unary not instruction now no longer exists. Change to xor.
|
