| /external/proguard/src/proguard/classfile/instruction/visitor/ |
| AllInstructionVisitor.java | 21 package proguard.classfile.instruction.visitor;
29 * This AttributeVisitor lets a given InstructionVisitor visit all Instruction
|
| /external/proguard/src/proguard/evaluation/ |
| BranchUnit.java | 34 * Sets the new instruction offset.
43 * Sets the new instruction offset, depending on the certainty of the
|
| /external/smali/dexlib2/src/main/java/org/jf/dexlib2/builder/ |
| MethodLocation.java | 36 import org.jf.dexlib2.iface.instruction.Instruction;
45 @Nullable BuilderInstruction instruction; field in class:MethodLocation
58 MethodLocation(@Nullable BuilderInstruction instruction, int codeAddress, int index) {
59 this.instruction = instruction;
65 public Instruction getInstruction() {
66 return instruction;
|
| /external/smali/dexlib2/src/main/java/org/jf/dexlib2/iface/instruction/ |
| FieldOffsetInstruction.java | 32 package org.jf.dexlib2.iface.instruction;
34 public interface FieldOffsetInstruction extends Instruction {
|
| InlineIndexInstruction.java | 32 package org.jf.dexlib2.iface.instruction;
34 public interface InlineIndexInstruction extends Instruction {
|
| OffsetInstruction.java | 32 package org.jf.dexlib2.iface.instruction;
34 public interface OffsetInstruction extends Instruction {
|
| OneRegisterInstruction.java | 32 package org.jf.dexlib2.iface.instruction;
34 public interface OneRegisterInstruction extends Instruction {
|
| PayloadInstruction.java | 32 package org.jf.dexlib2.iface.instruction;
37 public interface PayloadInstruction extends Instruction {
|
| VariableRegisterInstruction.java | 32 package org.jf.dexlib2.iface.instruction;
34 public interface VariableRegisterInstruction extends Instruction {
|
| VerificationErrorInstruction.java | 32 package org.jf.dexlib2.iface.instruction;
34 public interface VerificationErrorInstruction extends Instruction {
|
| VtableIndexInstruction.java | 32 package org.jf.dexlib2.iface.instruction;
34 public interface VtableIndexInstruction extends Instruction {
|
| WideLiteralInstruction.java | 32 package org.jf.dexlib2.iface.instruction;
34 public interface WideLiteralInstruction extends Instruction {
|
| /external/vixl/doc/ |
| changelog.md | 7 + Added support for `umulh` instruction.
12 + Complete NEON instruction set support.
23 + Added support for all `frint` instruction variants.
49 + Implement support for `adrp` instruction.
55 + Fix simulation of `extr` instruction.
62 + Added more tests for floating point instruction simulation.
96 + Improved robustness of instruction decoder and disassembler.
100 + Added instruction statistics collection class `instrument-a64.cc`.
|
| /prebuilts/gcc/linux-x86/host/x86_64-linux-glibc2.11-4.8/lib/gcc/x86_64-linux/4.8/include/ |
| xtestintrin.h | 29 # error "RTM instruction set not enabled"
35 /* Return non-zero if the instruction executes inside an RTM or HLE code
|
| /prebuilts/gcc/linux-x86/host/x86_64-linux-glibc2.15-4.8/lib/gcc/x86_64-linux/4.8/include/ |
| xtestintrin.h | 29 # error "RTM instruction set not enabled"
35 /* Return non-zero if the instruction executes inside an RTM or HLE code
|
| /prebuilts/gcc/linux-x86/host/x86_64-w64-mingw32-4.8/lib/gcc/x86_64-w64-mingw32/4.8.3/include/ |
| xtestintrin.h | 29 # error "RTM instruction set not enabled"
35 /* Return non-zero if the instruction executes inside an RTM or HLE code
|
| /prebuilts/gcc/linux-x86/host/x86_64-w64-mingw32-4.8/x86_64-w64-mingw32/include/ |
| signal.h | 36 #define SIGIOT 6 /* IOT instruction */
37 #define SIGEMT 7 /* EMT instruction */
|
| /art/compiler/dex/quick/arm/ |
| utility_arm.cc | 138 bool ArmMir2Lir::InexpensiveConstantInt(int32_t value, Instruction::Code opcode) {
140 case Instruction::ADD_INT:
141 case Instruction::ADD_INT_2ADDR:
142 case Instruction::SUB_INT:
143 case Instruction::SUB_INT_2ADDR:
148 case Instruction::IF_EQ:
149 case Instruction::IF_NE:
150 case Instruction::IF_LT:
151 case Instruction::IF_GE:
152 case Instruction::IF_GT
[all...] |
| /cts/apps/CtsVerifier/src/com/android/cts/verifier/widget/ |
| WidgetCtsProvider.java | 41 String instruction; field in class:WidgetCtsProvider.TextData
47 instruction = i;
164 String instruction = null; local
188 instruction = "This is a test of the widget framework";
191 instruction = "Verify that the width and height indicated below constitute reasonable"
197 instruction = "Verify that there is a functional affordance which allows this widget"
202 instruction = instruction
210 instruction = "Verify that the widget contains a scrollable list of numbers from 1"
214 instruction = "Verify that the text below accurately reflects whether this widget is
[all...] |
| /external/llvm/docs/CommandGuide/ |
| llvm-bcanalyzer.rst | 100 **Instruction List Bytes**
102 The size, in bytes, of all the instruction lists in all the functions.
171 **Total Instruction Size**
175 **Average Instruction Size**
177 The average number of bytes per instruction across all functions in the bitcode
178 file. This value is computed by dividing Total Instruction Size by Number Of
255 The number of instructions using the long instruction format in the function.
261 **Instruction Size**
265 **Average Instruction Size**
268 This value is computed by dividing Instruction Size by Instructions
[all...] |
| /external/llvm/lib/Transforms/Utils/ |
| AddDiscriminators.cpp | 14 // The main user of this is the sample profiler. Instruction samples are
109 /// with successor B2. The last instruction I1 in B1 and the first
110 /// instruction I2 in B2 are located at the same file and line number.
124 /// Notice how the branch instruction in block 'entry' and all the
130 /// instruction in block 'if.then' that share the same file and line
131 /// location with the last instruction of block 'entry'.
150 /// traverses the CFG and examines instruction at basic block boundaries.
151 /// If the last instruction I1 of a block B1 is at the same file and line
152 /// location as instruction I2 of successor B2, then it creates a new
153 /// lexical block for I2 and all the instruction in B2 that share the sam
[all...] |
| /art/compiler/optimizing/ |
| register_allocator_test.cc | 163 Instruction::CONST_4 | 0 | 0,
164 Instruction::RETURN);
198 Instruction::CONST_4 | 0 | 0,
199 Instruction::IF_EQ, 4,
200 Instruction::CONST_4 | 4 << 12 | 0,
201 Instruction::GOTO | 0xFD00,
202 Instruction::CONST_4 | 5 << 12 | 1 << 8,
203 Instruction::RETURN | 1 << 8);
242 Instruction::CONST_4 | 0 | 0,
243 Instruction::CONST_4 | 8 << 12 | 1 << 8
[all...] |
| ssa_builder.h | 36 * environment uses. Note that it does not imply the instruction will
77 void VisitInstruction(HInstruction* instruction);
78 void VisitTemporary(HTemporary* instruction);
81 HInstruction* instruction,
84 static HInstruction* GetReferenceTypeEquivalent(HInstruction* instruction);
|
| /art/compiler/dex/quick/ |
| gen_common.cc | 314 // Insert after last instruction.
349 void Mir2Lir::GenCompareAndBranch(Instruction::Code opcode, RegLocation rl_src1,
354 case Instruction::IF_EQ:
357 case Instruction::IF_NE:
360 case Instruction::IF_LT:
363 case Instruction::IF_GE:
366 case Instruction::IF_GT:
369 case Instruction::IF_LE:
413 void Mir2Lir::GenCompareZeroAndBranch(Instruction::Code opcode, RegLocation rl_src, LIR* taken) {
418 case Instruction::IF_EQZ
[all...] |
| /art/compiler/utils/arm/ |
| constants_arm.h | 41 // 4 bits option for the dmb instruction.
161 // instructions. Based on the "Figure 3-1 ARM instruction set summary".
184 // Immediate instruction fields encoding.
190 // Shift instruction register fields encodings.
197 // Load/store instruction offset field encoding.
202 // Mul instruction register fields encodings.
218 // architecture instruction set encoding as described in figure A3-1.
220 // Example: Test whether the instruction at ptr does set the condition code
241 // Get the raw instruction bits.
246 // Set the raw instruction bits to value
[all...] |
