| /external/dexmaker/src/dx/java/com/android/dx/dex/code/ |
| LocalStart.java | 24 * Pseudo-instruction which is used to introduce a new local variable. That
25 * is, an instance of this class in an instruction stream indicates that
26 * starting with the subsequent instruction, the indicated variable
|
| /external/dexmaker/src/dx/java/com/android/dx/rop/code/ |
| TranslationAdvice.java | 28 * instruction with the given opcode operating on the given arguments,
31 * The instruction associated must have exactly two sources.
55 * For example, Dex bytecode does not have instruction forms that take
|
| /external/javassist/src/main/javassist/bytecode/ |
| CodeIterator.java | 48 * Moves to the first instruction.
58 * <p>The index of the next instruction is set to the given index.
173 * Returns the index of the next instruction
201 * Moves to the instruction for
208 * <p>This method returns the index of INVOKESPECIAL instruction
211 * index of the next instruction following that INVOKESPECIAL.
215 * @return the index of the INVOKESPECIAL instruction, or -1
223 * Moves to the instruction for <code>super()</code>.
229 * <p>This method returns the index of INVOKESPECIAL instruction
232 * index of the next instruction following that INVOKESPECIAL
[all...] |
| /external/kernel-headers/original/uapi/asm-x86/asm/ |
| vm86.h | 34 - IO-instruction or similar */
35 #define VM86_INTx 2 /* int3/int x instruction (ARG = x) */
36 #define VM86_STI 3 /* sti/popf/iret instruction enabled
|
| /external/libunwind/doc/ |
| unw_get_proc_name.man | 45 word that is used to return the byte\-offset of the instruction\-pointer
52 stack frame with an instruction\-pointer value of 0x40003080 would
67 instruction\-pointer of the stack frame identified by cp\&.
|
| /external/libunwind/include/tdep-ia64/ |
| script.h | 42 instruction each. At the end of the script, psp gets popped,
43 accounting for one more instruction. */
70 /* hash table that maps instruction pointer to script index: */
|
| /external/lldb/include/lldb/Core/ |
| Disassembler.h | 30 class Instruction
33 Instruction (const Address &address,
37 ~Instruction();
129 Address m_address; // The section offset address of this instruction
130 // We include an address class in the Instruction class to
131 // allow the instruction specify the eAddressClassCodeAlternateISA
139 Opcode m_opcode; // The opcode for this instruction
199 public Instruction
214 // TODO: fill this in and put opcode name into Instruction::m_opcode_name,
215 // mnemonic into Instruction::m_mnemonics, and any comment into
[all...] |
| /external/llvm/docs/HistoricalNotes/ |
| 2001-02-09-AdveCommentsResponse.txt | 11 > essentially obvious from the instruction type:
16 > experience (e.g., in the br instruction), it doesn't seem to help as
38 should just use the instruction type as a hint, and that the
48 that will be added is an additional 'cast' instruction. I removed that
55 > There's a trade-off with the cast instruction:
57 > valid for the operands of each instruction (you probably have
123 > concern about an explicit 'icall' instruction?
126 now up in the instruction list next to 'call'.
129 > .NET has a tailcall instruction?
151 instruction... and I think that all predicated instructions can possibl
[all...] |
| /external/llvm/include/llvm/MC/ |
| MCWinEH.h | 23 struct Instruction {
29 Instruction(unsigned Op, MCSymbol *L, unsigned Reg, unsigned Off)
46 std::vector<Instruction> Instructions;
|
| /external/llvm/lib/Target/ARM/ |
| ARMInstrInfo.h | 1 //===-- ARMInstrInfo.h - ARM Instruction Information ------------*- C++ -*-===//
28 /// getNoopForMachoTarget - Return the noop instruction to use for a noop.
36 /// such, whenever a client has an instance of instruction info, it should
|
| Thumb1InstrInfo.h | 1 //===-- Thumb1InstrInfo.h - Thumb-1 Instruction Information -----*- C++ -*-===//
28 /// getNoopForMachoTarget - Return the noop instruction to use for a noop.
36 /// such, whenever a client has an instance of instruction info, it should
|
| /external/llvm/lib/Target/Mips/ |
| MipsModuleISelDAGToDAG.cpp | 2 // Instruction Selector Subtarget Control
7 // Mips Instruction selector.
30 return "MIPS DAG->DAG Pattern Instruction Selection";
|
| /external/llvm/test/CodeGen/X86/ |
| 2009-09-10-LoadFoldingBug.ll | 4 ; instruction. If done, the instruction does a 64-bit load and that's not
6 ; exception is when the instruction that folds the load is a move, then we
|
| codegen-prepare.ll | 5 ; does not wrongly rewrite the address computed by Instruction %4
11 ; - the store instruction stores a value at address [60 + %this]
12 ; - the first load instruction loads a value at address [12 + %this]
|
| /external/llvm/test/MC/ARM/ |
| thumb-not-mclass.s | 16 @ CHECK: error: instruction requires: !armv*m
25 @ CHECK: error: invalid operand for instruction
26 @ CHECK: error: invalid operand for instruction
|
| /external/mesa3d/src/gallium/drivers/r300/compiler/tests/ |
| radeon_compiler_util_tests.c | 37 * CMP instruction. A previous version of this function was ignoring
57 * instruction share the same register file and index. Normally, we
60 * source selects that the presubtract instruction expects
|
| /external/mesa3d/src/gallium/drivers/radeon/ |
| SIInstrInfo.h | 1 //===-- SIInstrInfo.h - SI Instruction Info Interface ---------------------===//
38 /// getEncodingType - Returns the encoding type of this instruction.
57 // First 4 bits are the instruction encoding
|
| /external/mesa3d/src/mesa/program/ |
| prog_instruction.h | 29 * Vertex/fragment program instruction datatypes and constants.
53 #define SWIZZLE_ZERO 4 /**< For SWZ instruction only */
54 #define SWIZZLE_ONE 5 /**< For SWZ instruction only */
109 * Instruction precision for GL_NV_fragment_program
142 * Program instruction opcodes for vertex, fragment and geometry programs.
254 * Instruction source register.
271 * instruction which allows per-component negation.
294 * Instruction destination register.
336 * Vertex/fragment program instruction.
345 * Indicates that the instruction should update the condition cod
[all...] |
| /external/smali/dexlib2/src/main/java/org/jf/dexlib2/dexbacked/instruction/ |
| DexBackedPackedSwitchPayload.java | 32 package org.jf.dexlib2.dexbacked.instruction;
37 import org.jf.dexlib2.iface.instruction.SwitchElement;
38 import org.jf.dexlib2.iface.instruction.formats.PackedSwitchPayload;
|
| DexBackedSparseSwitchPayload.java | 32 package org.jf.dexlib2.dexbacked.instruction;
37 import org.jf.dexlib2.iface.instruction.SwitchElement;
38 import org.jf.dexlib2.iface.instruction.formats.SparseSwitchPayload;
|
| /external/smali/dexlib2/src/main/java/org/jf/dexlib2/rewriter/ |
| MethodImplementationRewriter.java | 38 import org.jf.dexlib2.iface.instruction.Instruction;
65 @Override @Nonnull public Iterable<? extends Instruction> getInstructions() {
|
| Rewriters.java | 36 import org.jf.dexlib2.iface.instruction.Instruction;
50 @Nonnull Rewriter<Instruction> getInstructionRewriter();
|
| /external/v8/src/compiler/x64/ |
| instruction-codes-x64.h | 13 // Most opcodes specify a single instruction.
73 // Addressing modes represent the "shape" of inputs to an instruction.
75 // are encoded into the InstructionCode of the instruction and tell the
|
| /external/valgrind/none/tests/s390x/ |
| ecag.c | 44 case 0: type = "separate data and instruction"; break;
45 case 1: type = "instruction"; break;
47 case 3: type = "unified data and instruction"; break;
|
| /external/vixl/src/vixl/a64/ |
| instrument-a64.h | 84 #define DECLARE(A) void Visit##A(const Instruction* instr);
96 void InstrumentLoadStore(const Instruction* instr);
97 void InstrumentLoadStorePair(const Instruction* instr);
|
