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  /external/llvm/test/MC/Disassembler/Mips/mips1/
valid-mips1-el.txt 53 0x79 0xef 0xf4 0x89 # CHECK: lwl $20, -4231($15)
valid-mips1.txt 53 0x89 0xf4 0xef 0x79 # CHECK: lwl $20, -4231($15)
  /external/llvm/test/MC/Disassembler/Mips/mips2/
valid-mips2-el.txt 67 0x79 0xef 0xf4 0x89 # CHECK: lwl $20, -4231($15)
valid-mips2.txt 67 0x89 0xf4 0xef 0x79 # CHECK: lwl $20, -4231($15)
  /external/llvm/test/MC/Disassembler/Mips/mips32/
valid-mips32-el.txt 85 0x03 0x00 0x82 0x88 # CHECK: lwl $2, 3($4)
valid-mips32.txt 85 0x88 0x82 0x00 0x03 # CHECK: lwl $2, 3($4)
  /external/llvm/test/MC/Disassembler/Mips/
mips32.txt 246 # CHECK: lwl $2, 3($4)
mips32_le.txt 245 # CHECK: lwl $2, 3($4)
mips32r2.txt 257 # CHECK: lwl $2, 3($4)
mips32r2_le.txt 257 # CHECK: lwl $2, 3($4)
  /external/llvm/test/MC/Mips/mips2/
valid.s 79 lwl $s4,-4231($15)
  /bionic/libc/arch-mips/string/
memcpy.S 258 # define C_LDHI lwl /* high part is left in big-endian */
265 # define C_LDLO lwl /* low part is left in little-endian */
  /external/libvpx/libvpx/third_party/libyuv/source/
scale_mips.cc 152 "lwl $t1, 3(%[src_ptr]) \n"
154 "lwl $t2, 3(%[t]) \n"
    [all...]
  /external/llvm/lib/Target/Mips/
MipsISelLowering.cpp 148 case MipsISD::LWL: return "MipsISD::LWL";
    [all...]
MipsISelLowering.h 198 LWL = ISD::FIRST_TARGET_MEMORY_OPCODE,
  /external/v8/src/mips/
disasm-mips.cc     [all...]
  /external/v8/src/mips64/
disasm-mips64.cc     [all...]
  /external/llvm/test/MC/Disassembler/Mips/mips3/
valid-mips3-el.txt 111 0x79 0xef 0xf4 0x89 # CHECK: lwl $20, -4231($15)
valid-mips3.txt 111 0x89 0xf4 0xef 0x79 # CHECK: lwl $20, -4231($15)
  /external/llvm/test/MC/Disassembler/Mips/mips32r2/
valid-mips32r2-le.txt 97 0x03 0x00 0x82 0x88 # CHECK: lwl $2, 3($4)
valid-mips32r2.txt 97 0x88 0x82 0x00 0x03 # CHECK: lwl $2, 3($4)
  /external/llvm/test/MC/Disassembler/Mips/mips32r3/
valid-mips32r3-le.txt 94 0x03 0x00 0x82 0x88 # CHECK: lwl $2, 3($4)
valid-mips32r3.txt 94 0x88 0x82 0x00 0x03 # CHECK: lwl $2, 3($4)
  /external/llvm/test/MC/Disassembler/Mips/mips32r5/
valid-mips32r5-le.txt 94 0x03 0x00 0x82 0x88 # CHECK: lwl $2, 3($4)
valid-mips32r5.txt 94 0x88 0x82 0x00 0x03 # CHECK: lwl $2, 3($4)

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