| /external/llvm/test/MC/Disassembler/Mips/mips4/ |
| valid-mips4-el.txt | 115 0x79 0xef 0xf4 0x89 # CHECK: lwl $20, -4231($15)
|
| valid-mips4.txt | 115 0x89 0xf4 0xef 0x79 # CHECK: lwl $20, -4231($15)
|
| /external/llvm/test/MC/Disassembler/Mips/mips64/ |
| valid-mips64-el.txt | 141 0x03 0x00 0x82 0x88 # CHECK: lwl $2, 3($4)
|
| valid-mips64.txt | 141 0x88 0x82 0x00 0x03 # CHECK: lwl $2, 3($4)
|
| /external/llvm/test/MC/Disassembler/Mips/mips64r2/ |
| valid-mips64r2-el.txt | 157 0x03 0x00 0x82 0x88 # CHECK: lwl $2, 3($4)
|
| valid-mips64r2.txt | 157 0x88 0x82 0x00 0x03 # CHECK: lwl $2, 3($4)
|
| /external/llvm/test/MC/Disassembler/Mips/mips64r3/ |
| valid-mips64r3-el.txt | 154 0x03 0x00 0x82 0x88 # CHECK: lwl $2, 3($4)
|
| valid-mips64r3.txt | 154 0x88 0x82 0x00 0x03 # CHECK: lwl $2, 3($4)
|
| /external/llvm/test/MC/Disassembler/Mips/mips64r5/ |
| valid-mips64r5-el.txt | 154 0x03 0x00 0x82 0x88 # CHECK: lwl $2, 3($4)
|
| valid-mips64r5.txt | 154 0x88 0x82 0x00 0x03 # CHECK: lwl $2, 3($4)
|
| /external/llvm/test/MC/Mips/mips3/ |
| valid.s | 133 lwl $s4,-4231($15)
|
| /external/llvm/test/MC/Mips/mips32/ |
| valid.s | 86 lwl $s4,-4231($15)
|
| /external/llvm/test/MC/Mips/mips32r2/ |
| valid.s | 97 lwl $s4,-4231($15)
|
| /external/llvm/test/MC/Mips/mips32r3/ |
| valid.s | 97 lwl $s4,-4231($15)
|
| /external/llvm/test/MC/Mips/mips32r5/ |
| valid.s | 97 lwl $s4,-4231($15)
|
| /external/llvm/test/MC/Mips/mips4/ |
| valid.s | 138 lwl $s4,-4231($15)
|
| /external/llvm/test/MC/Mips/mips5/ |
| valid.s | 139 lwl $s4,-4231($15)
|
| /external/llvm/test/MC/Mips/mips64/ |
| valid.s | 144 lwl $s4,-4231($15)
|
| /external/valgrind/docs/internals/ |
| 3_10_BUGSTATUS.txt | 417 346562 MIPS64: lwl/lwr instructions are performing 64bit loads
|
| /system/core/libpixelflinger/codeflinger/ |
| mips_disassem.c | 73 /*32 */ "lb ", "lh ", "lwl", "lw ", "lbu", "lhu", "lwr", "lwu",
|
| /external/llvm/lib/Target/Mips/ |
| MicroMipsInstrInfo.td | 709 def LWL_MM : LoadLeftRightMM<"lwl", MipsLWL, GPR32Opnd, mem_mm_12>,
[all...] |
| Mips64InstrInfo.td | 192 def LWL64 : LoadLeftRight<"lwl", MipsLWL, GPR64Opnd, II_LWL>, LW_FM<0x22>;
|
| /external/llvm/test/MC/Mips/mips64r2/ |
| valid.s | 160 lwl $s4,-4231($15)
|
| /external/llvm/test/MC/Mips/mips64r3/ |
| valid.s | 160 lwl $s4,-4231($15)
|
| /external/llvm/test/MC/Mips/mips64r5/ |
| valid.s | 160 lwl $s4,-4231($15)
|
