| /external/llvm/test/MC/Disassembler/Mips/mips32r5/ |
| valid-mips32r5.txt | 95 0x98 0xa3 0x00 0x10 # CHECK: lwr $3, 16($5)
|
| /external/llvm/test/MC/Disassembler/Mips/mips4/ |
| valid-mips4-el.txt | 116 0x35 0xb5 0x80 0x9b # CHECK: lwr $zero, -19147($gp)
|
| valid-mips4.txt | 116 0x9b 0x80 0xb5 0x35 # CHECK: lwr $zero, -19147($gp)
|
| /external/llvm/test/MC/Disassembler/Mips/mips64/ |
| valid-mips64-el.txt | 142 0x10 0x00 0xa3 0x98 # CHECK: lwr $3, 16($5)
|
| valid-mips64.txt | 142 0x98 0xa3 0x00 0x10 # CHECK: lwr $3, 16($5)
|
| /external/llvm/test/MC/Disassembler/Mips/mips64r2/ |
| valid-mips64r2-el.txt | 158 0x10 0x00 0xa3 0x98 # CHECK: lwr $3, 16($5)
|
| valid-mips64r2.txt | 158 0x98 0xa3 0x00 0x10 # CHECK: lwr $3, 16($5)
|
| /external/llvm/test/MC/Disassembler/Mips/mips64r3/ |
| valid-mips64r3-el.txt | 155 0x10 0x00 0xa3 0x98 # CHECK: lwr $3, 16($5)
|
| valid-mips64r3.txt | 155 0x98 0xa3 0x00 0x10 # CHECK: lwr $3, 16($5)
|
| /external/llvm/test/MC/Disassembler/Mips/mips64r5/ |
| valid-mips64r5-el.txt | 155 0x10 0x00 0xa3 0x98 # CHECK: lwr $3, 16($5)
|
| valid-mips64r5.txt | 155 0x98 0xa3 0x00 0x10 # CHECK: lwr $3, 16($5)
|
| /external/llvm/test/MC/Mips/mips3/ |
| valid.s | 134 lwr $zero,-19147($gp)
|
| /external/llvm/test/MC/Mips/mips32/ |
| valid.s | 87 lwr $zero,-19147($gp)
|
| /external/llvm/test/MC/Mips/mips32r2/ |
| valid.s | 98 lwr $zero,-19147($gp)
|
| /external/llvm/test/MC/Mips/mips32r3/ |
| valid.s | 98 lwr $zero,-19147($gp)
|
| /external/llvm/test/MC/Mips/mips32r5/ |
| valid.s | 98 lwr $zero,-19147($gp)
|
| /external/llvm/test/MC/Mips/mips4/ |
| valid.s | 139 lwr $zero,-19147($gp)
|
| /external/llvm/test/MC/Mips/mips5/ |
| valid.s | 140 lwr $zero,-19147($gp)
|
| /external/llvm/test/MC/Mips/mips64/ |
| valid.s | 145 lwr $zero,-19147($gp)
|
| /external/valgrind/docs/internals/ |
| 3_10_BUGSTATUS.txt | 417 346562 MIPS64: lwl/lwr instructions are performing 64bit loads
|
| /system/core/libpixelflinger/codeflinger/ |
| mips_disassem.c | 73 /*32 */ "lb ", "lh ", "lwl", "lw ", "lbu", "lhu", "lwr", "lwu",
|
| /external/llvm/lib/Target/Mips/ |
| MicroMipsInstrInfo.td | 711 def LWR_MM : LoadLeftRightMM<"lwr", MipsLWR, GPR32Opnd, mem_mm_12>,
[all...] |
| Mips64InstrInfo.td | 193 def LWR64 : LoadLeftRight<"lwr", MipsLWR, GPR64Opnd, II_LWR>, LW_FM<0x26>;
|
| /external/llvm/test/MC/Mips/mips64r2/ |
| valid.s | 161 lwr $zero,-19147($gp)
|
| /external/llvm/test/MC/Mips/mips64r3/ |
| valid.s | 161 lwr $zero,-19147($gp)
|
