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  /external/llvm/test/CodeGen/Mips/
abiflags-xx.ll 1 ; RUN: llc -filetype=asm -mtriple mipsel-unknown-linux -mcpu=mips32 -mattr=fpxx %s -o - | FileCheck %s
micromips-rdhwr-directives.ll 1 ; RUN: llc -march=mipsel -mcpu=mips32 -relocation-model=static < %s \
rdhwr-directives.ll 1 ; RUN: llc -march=mipsel -mcpu=mips32 -relocation-model=static < %s | FileCheck %s
abicalls.ll 1 ; RUN: llc -filetype=asm -mtriple mipsel-unknown-linux -mcpu=mips32 -relocation-model=static %s -o - | FileCheck -check-prefix=ABICALLS -check-prefix=STATIC %s
2 ; RUN: llc -filetype=asm -mtriple mipsel-unknown-linux -mcpu=mips32 %s -o - | FileCheck -check-prefix=ABICALLS -check-prefix=PIC %s
6 ; RUN: llc -filetype=asm -mtriple mipsel-unknown-linux -mcpu=mips32 -mattr noabicalls -relocation-model=static %s -o - | FileCheck -implicit-check-not='.abicalls' -implicit-check-not='pic0' %s
  /external/llvm/test/MC/Mips/
eh-frame.s 7 // RUN: llvm-objdump -r -s %t.o | FileCheck --check-prefix=MIPS32 %s
22 // MIPS32: RELOCATION RECORDS FOR [.rel.eh_frame]:
23 // MIPS32-NEXT: R_MIPS_32
24 // MIPS32: Contents of section .eh_frame:
25 // MIPS32-NEXT: 0000
28 // MIPS32: 00000010
31 // MIPS32: 00000000
34 // MIPS32: 03
37 // MIPS32: 7a5200
40 // MIPS32: 0
    [all...]
elf_eflags_abicalls.s 1 # RUN: llvm-mc -filetype=obj -triple mipsel-unknown-linux -mcpu=mips32 %s -o -| llvm-readobj -h | FileCheck %s
elf_eflags_micromips.s 1 # RUN: llvm-mc -filetype=obj -triple mipsel-unknown-linux -mcpu=mips32 %s -o -| llvm-readobj -h | FileCheck %s
elf_eflags_mips16.s 1 # RUN: llvm-mc -filetype=obj -triple mipsel-unknown-linux -mcpu=mips32 %s -o -| llvm-readobj -h | FileCheck %s
elf_eflags_noreorder.s 1 # RUN: llvm-mc -filetype=obj -triple mipsel-unknown-linux -mcpu=mips32 %s -o -| llvm-readobj -h | FileCheck %s
elf_eflags_pic0.s 1 # RUN: llvm-mc -filetype=obj -triple mipsel-unknown-linux -mcpu=mips32 %s -o -| llvm-readobj -h | FileCheck %s
elf_eflags_pic2.s 1 # RUN: llvm-mc -filetype=obj -triple mipsel-unknown-linux -mcpu=mips32 %s -o -| llvm-readobj -h | FileCheck %s
set-mips-directives.s 16 .set mips32
20 .set mips32
23 .set mips32
52 # CHECK: .set mips32
56 # CHECK: .set mips32
59 # CHECK: .set mips32
elf_eflags_nanlegacy.s 1 # RUN: llvm-mc -filetype=obj -triple mipsel-unknown-linux -mcpu=mips32 %s -o - | \
4 # RUN: llvm-mc -triple mipsel-unknown-linux -mcpu=mips32 %s -o -| \
set-arch.s 1 # RUN: llvm-mc %s -triple=mipsel-unknown-linux -show-encoding -mcpu=mips32 | \
15 .set arch=mips32
19 .set arch=mips32
22 .set arch=mips32
53 # CHECK: .set arch=mips32
  /external/valgrind/memcheck/tests/linux/
getregset.vgtest 3 prereq: ../../../tests/os_test linux 2.6.33 && ! ../../../tests/arch_test mips32 && ! `../../../tests/arch_test ppc64`
  /external/valgrind/memcheck/tests/vbit-test/
irops.c 14 { DEFOP(Iop_Add8, UNDEF_LEFT), .s390x = 1, .amd64 = 1, .x86 = 1, .arm = 0, .ppc64 = 1, .ppc32 = 1, .mips32 = 1, .mips64 = 1, .tilegx = 0 },
15 { DEFOP(Iop_Add16, UNDEF_LEFT), .s390x = 1, .amd64 = 1, .x86 = 1, .arm = 0, .ppc64 = 1, .ppc32 = 1, .mips32 = 1, .mips64 = 1, .tilegx = 0 },
16 { DEFOP(Iop_Add32, UNDEF_LEFT), .s390x = 1, .amd64 = 1, .x86 = 1, .arm = 1, .ppc64 = 1, .ppc32 = 1, .mips32 = 1, .mips64 = 1, .tilegx = 1 },
17 { DEFOP(Iop_Add64, UNDEF_LEFT), .s390x = 1, .amd64 = 1, .x86 = 1, .arm = 1, .ppc64 = 1, .ppc32 = 1, .mips32 = 0, .mips64 = 1, .tilegx = 1 }, // mips asserts
18 { DEFOP(Iop_Sub8, UNDEF_LEFT), .s390x = 1, .amd64 = 1, .x86 = 1, .arm = 0, .ppc64 = 1, .ppc32 = 1, .mips32 = 1, .mips64 = 1, .tilegx = 1 },
19 { DEFOP(Iop_Sub16, UNDEF_LEFT), .s390x = 1, .amd64 = 1, .x86 = 1, .arm = 0, .ppc64 = 0, .ppc32 = 0, .mips32 = 1, .mips64 = 1, .tilegx = 1 },
20 { DEFOP(Iop_Sub32, UNDEF_LEFT), .s390x = 1, .amd64 = 1, .x86 = 1, .arm = 1, .ppc64 = 1, .ppc32 = 1, .mips32 = 1, .mips64 = 1, .tilegx = 1 },
21 { DEFOP(Iop_Sub64, UNDEF_LEFT), .s390x = 1, .amd64 = 1, .x86 = 1, .arm = 1, .ppc64 = 1, .ppc32 = 0, .mips32 = 0, .mips64 = 1, .tilegx = 1 }, // ppc32, mips assert
22 { DEFOP(Iop_Mul8, UNDEF_LEFT), .s390x = 0, .amd64 = 0, .x86 = 0, .arm = 0, .ppc64 = 0, .ppc32 = 0, .mips32 = 0, .mips64 = 0, .tilegx = 0 },
23 { DEFOP(Iop_Mul16, UNDEF_LEFT), .s390x = 0, .amd64 = 1, .x86 = 1, .arm = 0, .ppc64 = 0, .ppc32 = 0, .mips32 = 0, .mips64 = 0, .tilegx = 0 }
    [all...]
  /external/llvm/test/CodeGen/Mips/msa/
2r_vector_scalar.ll 5 ; RUN: FileCheck %s -check-prefix=MIPS-ANY -check-prefix=MIPS32
7 ; RUN: FileCheck %s -check-prefix=MIPS-ANY -check-prefix=MIPS32
27 ; MIPS32-DAG: lw [[R1:\$[0-9]+]],
47 ; MIPS32-DAG: lw [[R1:\$[0-9]+]],
67 ; MIPS32-DAG: lw [[R1:\$[0-9]+]],
87 ; MIPS32-DAG: lw [[R1:\$[0-9]+]], 0(
88 ; MIPS32-DAG: lw [[R2:\$[0-9]+]], 4(
90 ; MIPS32-DAG: ldi.b [[R3:\$w[0-9]+]], 0
91 ; MIPS32-DAG: insert.w [[R3]][0], [[R1]]
92 ; MIPS32-DAG: insert.w [[R3]][1], [[R2]
    [all...]
elm_copy.ll 5 ; RUN: FileCheck %s -check-prefix=MIPS-ANY -check-prefix=MIPS32
7 ; RUN: FileCheck %s -check-prefix=MIPS-ANY -check-prefix=MIPS32
27 ; MIPS32-DAG: lw [[R1:\$[0-9]+]], %got(llvm_mips_copy_s_b_ARG1)
31 ; MIPS32-DAG: lw [[RES:\$[0-9]+]], %got(llvm_mips_copy_s_b_RES)
50 ; MIPS32-DAG: lw [[R1:\$[0-9]+]], %got(llvm_mips_copy_s_h_ARG1)
54 ; MIPS32-DAG: lw [[RES:\$[0-9]+]], %got(llvm_mips_copy_s_h_RES)
73 ; MIPS32-DAG: lw [[R1:\$[0-9]+]], %got(llvm_mips_copy_s_w_ARG1)
77 ; MIPS32-DAG: lw [[RES:\$[0-9]+]], %got(llvm_mips_copy_s_w_RES)
96 ; MIPS32-DAG: lw [[R1:\$[0-9]+]], %got(llvm_mips_copy_s_d_ARG1)
98 ; MIPS32-DAG: ld.w [[WS:\$w[0-9]+]], 0([[R1]]
    [all...]
  /external/clang/test/Driver/
target-abi-cc1as.s 4 // RUN: %clang -cc1as -triple mips--linux-gnu -filetype obj -target-cpu mips32 -target-abi o32 %s 2>&1 | \
  /external/llvm/test/MC/Mips/mips32/
invalid-mips32r2-xfail.s 4 # RUN: not llvm-mc %s -triple=mips-unknown-linux -show-encoding -mcpu=mips32 \
  /external/llvm/test/CodeGen/Mips/Fast-ISel/
loadstoreconv.ll 3 ; RUN: llc -march=mipsel -relocation-model=pic -O0 -mips-fast-isel -fast-isel-abort=1 -mcpu=mips32 \
7 ; RUN: llc -march=mipsel -relocation-model=pic -O0 -mips-fast-isel -fast-isel-abort=1 -mcpu=mips32 \
8 ; RUN: < %s | FileCheck %s -check-prefix=mips32
72 ; mips32-LABEL: .ent _Z4sc_iv
82 ; mips32: lbu $[[REG1:[0-9]+]], 0(${{[0-9]+}})
83 ; mips32: sll $[[REG2:[0-9]+]], $[[REG1]], 24
84 ; mips32: sra ${{[0-9]+}}, $[[REG2]], 24
110 ; mips32=LABEL: .ent _Z4ss_iv
120 ; mips32: lhu $[[REG1:[0-9]+]], 0(${{[0-9]+}})
121 ; mips32: sll $[[REG2:[0-9]+]], $[[REG1]], 1
    [all...]
callabi.ll 3 ; RUN: llc -march=mipsel -relocation-model=pic -O0 -mips-fast-isel -fast-isel-abort=1 -mcpu=mips32 \
7 ; RUN: llc -march=mipsel -relocation-model=pic -O0 -mips-fast-isel -fast-isel-abort=1 -mcpu=mips32 \
8 ; RUN: < %s | FileCheck %s -check-prefix=mips32
11 ; RUN: llc -march=mipsel -relocation-model=pic -O0 -mips-fast-isel -fast-isel-abort=1 -mcpu=mips32 \
86 ; mips32-LABEL: cxiiiiconv
98 ; mips32: addu $[[REG_GP:[0-9]+]], ${{[0-9]+}}, ${{[0-9+]}}
102 ; mips32-DAG: lw $[[REG_C1_ADDR:[0-9]+]], %got(c1)($[[REG_GP]])
103 ; mips32-DAG: lbu $[[REG_C1:[0-9]+]], 0($[[REG_C1_ADDR]])
104 ; mips32-DAG: sll $[[REG_C1_1:[0-9]+]], $[[REG_C1]], 24
105 ; mips32-DAG: sra $4, $[[REG_C1_1]], 2
    [all...]
nullvoid.ll 3 ; RUN: llc -march=mipsel -relocation-model=pic -O0 -mips-fast-isel -fast-isel-abort=1 -mcpu=mips32 \
  /external/clang/test/CodeGen/
atomics-inlining.c 4 // RUN: %clang_cc1 -triple mipsel-linux-gnu -emit-llvm %s -o - | FileCheck %s -check-prefix=MIPS32
70 // MIPS32-LABEL: define void @test1
71 // MIPS32: = load atomic i8, i8* @c1 seq_cst
72 // MIPS32: store atomic i8 {{.*}}, i8* @c1 seq_cst
73 // MIPS32: = load atomic i16, i16* @s1 seq_cst
74 // MIPS32: store atomic i16 {{.*}}, i16* @s1 seq_cst
75 // MIPS32: = load atomic i32, i32* @i1 seq_cst
76 // MIPS32: store atomic i32 {{.*}}, i32* @i1 seq_cst
77 // MIPS32: call i64 @__atomic_load_8(i8* bitcast (i64* @ll1 to i8*)
78 // MIPS32: call void @__atomic_store_8(i8* bitcast (i64* @ll1 to i8*), i6
    [all...]
  /external/llvm/test/MC/Disassembler/Mips/msa/
test_i10.txt 1 # RUN: llvm-mc --disassemble %s -triple=mips-unknown-linux -mcpu=mips32 -mattr=+msa | FileCheck %s

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