| /external/llvm/test/CodeGen/X86/ |
| vector-shuffle-128-v4.ll | 588 ; SSE2-NEXT: movss {{.*#+}} xmm1 = xmm0[0],xmm1[1,2,3]
595 ; SSE3-NEXT: movss {{.*#+}} xmm1 = xmm0[0],xmm1[1,2,3]
602 ; SSSE3-NEXT: movss {{.*#+}} xmm1 = xmm0[0],xmm1[1,2,3]
[all...] |
| select.ll | 55 ; CHECK: movss {{.*}},4), %xmm0
58 ; ATOM: movss {{.*}},4), %xmm0
|
| sqrt-fastmath.ll | 73 ; CHECK-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
|
| sse41.ll | 141 ; X32-NEXT: movss %xmm0, (%esp)
160 ; X32-NEXT: movss %xmm0, (%esp)
203 ; generate a separate movss to load the scalar operand.
207 ; X32-NEXT: movss {{.*#+}} xmm1
[all...] |
| multiple-loop-post-inc.ll | 79 %asmtmp.i = call <4 x float> asm "movss $1, $0\09\0Apshufd $$0, $0, $0", "=x,*m,~{dirflag},~{fpsr},~{flags}"(float* %times4) nounwind ; <<4 x float>> [#uses=3]
83 %asmtmp.i18 = call <4 x float> asm "movss $1, $0\09\0Apshufd $$0, $0, $0", "=x,*m,~{dirflag},~{fpsr},~{flags}"(float* %timesN) nounwind ; <<4 x float>> [#uses=8]
161 %asmtmp.i17 = call <4 x float> asm "movss $1, $0\09\0Apshufd $$0, $0, $0", "=x,*m,~{dirflag},~{fpsr},~{flags}"(float* %times4) nounwind ; <<4 x float>> [#uses=0]
|
| /external/valgrind/memcheck/tests/amd64/ |
| sse_memory.stdout.exp | 281 r movss 78fdde3d42fed1ab5ec606e6d7a56bc8 dacdc4f57da1e9e2e2e254abc2bf1cd3 78fdde3d7da1e9e2e2e254abc2bf1cd3
282 r movss c6fad4f48a8531f0c332fe5ea48fc5b8 8c7431f147d3c4edba64ede3e634809a c6fad4f447d3c4edba64ede3e634809a
283 r movss 1791633f4ae10e450b6b3e4f16dc785c 5992ac87baee69063f7f720d8f0fb884 1791633fbaee69063f7f720d8f0fb884
284 r movss d7f70bd236ed7147b374d5c2f1361aa2 cffad50dac6d016e0dd415d0a49b7f1f d7f70bd2ac6d016e0dd415d0a49b7f1f
285 r movss d33ead456464c177972f349c5a29a657 da5daeba50a9144121e866b16802ecda d33ead4550a9144121e866b16802ecda
286 m movss b625d01e 3757890f47dfc831f55f2da4d51e732c b625d01e000000000000000000000000
287 m movss 6325b005 69f4ce9415f903b849591ec890164085 6325b005000000000000000000000000
288 m movss ec870bb7 eeb2334bef6efac91caac7a91a4fb488 ec870bb7000000000000000000000000
289 m movss 8419736c f41b124c5989f8ef1a7a29937fceb170 8419736c000000000000000000000000
290 m movss 9215874c 312e9f315f979a73e06471b082577654 9215874c00000000000000000000000
[all...] |
| /external/elfutils/src/tests/ |
| testfile44.expect.bz2 | |
| /art/compiler/optimizing/ |
| code_generator_x86_64.cc | 639 __ movss(destination.AsFpuRegister<XmmRegister>(),
651 __ movss(Address(CpuRegister(RSP), destination.GetStackIndex()),
[all...] |
| intrinsics_x86_64.cc | 101 __ movss(trg_reg, XmmRegister(XMM0));
305 __ movss(xmm_temp, codegen->LiteralInt32Address(INT32_C(0x7FFFFFFF)));
456 __ movss(out, codegen->LiteralInt32Address(INT32_C(0x7FC00000)));
465 __ movss(out, op2);
723 __ movss(inPlusPointFive, codegen_->LiteralFloatAddress(0.5f));
[all...] |
| code_generator_x86.cc | 635 __ movss(destination.AsFpuRegister<XmmRegister>(), Address(ESP, source.GetStackIndex()));
642 __ movss(Address(ESP, destination.GetStackIndex()), source.AsFpuRegister<XmmRegister>());
[all...] |
| /art/compiler/utils/x86/ |
| assembler_x86.cc | 294 void X86Assembler::movss(XmmRegister dst, const Address& src) { function in class:art::x86::X86Assembler
303 void X86Assembler::movss(const Address& dst, XmmRegister src) { function in class:art::x86::X86Assembler
312 void X86Assembler::movss(XmmRegister dst, XmmRegister src) { function in class:art::x86::X86Assembler
[all...] |
| assembler_x86.h | 259 void movss(XmmRegister dst, const Address& src);
260 void movss(const Address& dst, XmmRegister src);
261 void movss(XmmRegister dst, XmmRegister src);
|
| /art/compiler/utils/x86_64/ |
| assembler_x86_64.h | 360 void movss(XmmRegister dst, const Address& src);
361 void movss(const Address& dst, XmmRegister src);
362 void movss(XmmRegister dst, XmmRegister src);
|
| assembler_x86_64.cc | 361 void X86_64Assembler::movss(XmmRegister dst, const Address& src) { function in class:art::x86_64::X86_64Assembler
371 void X86_64Assembler::movss(const Address& dst, XmmRegister src) { function in class:art::x86_64::X86_64Assembler
381 void X86_64Assembler::movss(XmmRegister dst, XmmRegister src) { function in class:art::x86_64::X86_64Assembler
384 EmitOptionalRex32(src, dst); // Movss is MR encoding instead of the usual RM.
[all...] |
| assembler_x86_64_test.cc | 811 TEST_F(AssemblerX86_64Test, Movss) {
812 DriverStr(RepeatFF(&x86_64::X86_64Assembler::movss, "movss %{reg2}, %{reg1}"), "movss");
[all...] |
| /external/valgrind/none/tests/amd64/ |
| insn_sse.def | 82 movss xmm.ps[12.34,56.78,43.21,87.65] xmm.ps[11.11,22.22,33.33,44.44] => 1.ps[12.34,22.22,33.33,44.44]
83 movss m32.ps[12.34] xmm.ps[11.11,22.22,33.33,44.44] => 1.ps[12.34,0.0,0.0,0.0]
84 movss xmm.ps[12.34,56.78,43.21,87.65] m32.ps[11.11] => 1.ps[12.34]
|
| redundantRexW.c | 496 /* movss mem, reg f3 48 0f 10 5e 04 rex.W movss 0x4(%rsi),%xmm3 */
510 after_test( "rex.W movss 0x4(%rsi),%xmm3", regs, mem );
|
| /external/valgrind/none/tests/x86/ |
| insn_sse.def | 82 movss xmm.ps[12.34,56.78,43.21,87.65] xmm.ps[11.11,22.22,33.33,44.44] => 1.ps[12.34,22.22,33.33,44.44]
83 movss m32.ps[12.34] xmm.ps[11.11,22.22,33.33,44.44] => 1.ps[12.34,0.0,0.0,0.0]
84 movss xmm.ps[12.34,56.78,43.21,87.65] m32.ps[11.11] => 1.ps[12.34]
|
| /development/perftests/panorama/feature_stab/db_vlvm/ |
| db_feature_detection.cpp | 516 movss xmm7,k
807 movss back,xmm0
865 movss back,xmm0
[all...] |
| /packages/apps/Camera/jni/feature_stab/db_vlvm/ |
| db_feature_detection.cpp | 516 movss xmm7,k
807 movss back,xmm0
865 movss back,xmm0
[all...] |
| /packages/apps/LegacyCamera/jni/feature_stab/db_vlvm/ |
| db_feature_detection.cpp | 516 movss xmm7,k
807 movss back,xmm0
865 movss back,xmm0
[all...] |
| /external/llvm/lib/Target/X86/ |
| README-X86-64.txt | 28 movss LCPI1_0(%rip), %xmm1
|
| /external/v8/src/ia32/ |
| assembler-ia32.h | [all...] |
| /external/v8/src/compiler/x64/ |
| code-generator-x64.cc | 572 __ movss(i.OutputDoubleRegister(), i.MemoryOperand());
578 __ movss(operand, xmm0);
|
| /external/v8/test/cctest/ |
| test-assembler-ia32.cc | 571 __ movss(xmm0, Operand(esp, kPointerSize));
572 __ movss(xmm1, Operand(esp, 2 * kPointerSize));
|
