| /external/llvm/include/llvm/Target/ |
| TargetSchedule.td | 49 // (3) A per-pipeline-stage machine model can be implemented by providing
150 // an in-order pipeline within an out-of-order core where scheduling
309 // to implement pipeline bypass. The Writes list may be empty to
319 // pipeline bypess. For use with InstRW or ItinRW.
|
| /external/llvm/lib/CodeGen/ |
| PostRASchedulerList.cpp | 16 // pipeline or resource constraints) or because an input to the instruction has
51 STATISTIC(NumStalls, "Number of pipeline stalls");
621 // Otherwise, we have a pipeline stall, but no other problem,
629 // processors without pipeline interlocks and other cases.
|
| /external/llvm/lib/Target/ARM/ |
| ARMTargetMachine.h | 54 // Pass Pipeline Configuration
|
| /external/llvm/test/CodeGen/AArch64/ |
| arm64-misched-basic-A57.ll | 5 ; issue to the same pipeline. Instead, it will move other instructions between
|
| /external/mesa3d/src/gallium/auxiliary/draw/ |
| draw_context.h | 273 * Draw pipeline
|
| draw_pipe_twoside.c | 163 * Create twoside pipeline stage.
|
| /external/mesa3d/src/gallium/docs/source/ |
| distro.rst | 150 Draw is a software :term:`TCL` pipeline for hardware that lacks vertex shaders
|
| /external/mesa3d/src/gallium/drivers/i915/ |
| i915_context.c | 194 /* augmented draw pipeline clobbers state functions */
|
| i915_prim_emit.c | 209 * the 'draw' module's pipeline.
|
| /external/mesa3d/src/gallium/drivers/softpipe/ |
| sp_context.h | 150 /** Software quad rendering pipeline */
|
| /external/mesa3d/src/gallium/drivers/svga/ |
| svga_state_need_swtnl.c | 181 "need pipeline",
|
| /external/mesa3d/src/mesa/drivers/dri/i915/ |
| intel_render.c | 170 /* Render pipeline stage */
|
| /external/mesa3d/src/mesa/drivers/dri/i965/ |
| brw_wm_iz.c | 137 * Test Cases [Pre-DevGT] of the 3D Pipeline - Windower B-Spec.
|
| gen6_blorp.cpp | 95 * Select the 3D pipeline, as opposed to the media pipeline.
595 * [DevSNB] A pipeline flush must be programmed prior to a
597 * toggle. Pipeline flush can be executed by sending a PIPE_CONTROL
[all...] |
| gen6_sol.c | 200 * least the GS stage of the pipeline, and flush out the render cache. For
|
| gen6_urb.c | 110 * doesn't exist on Gen6). So for now we just do a full pipeline flush as
|
| gen7_urb.c | 51 * See "Volume 2a: 3D Pipeline," section 1.8.
|
| /external/mesa3d/src/mesa/tnl/ |
| t_context.c | 138 tnl->pipeline.new_state |= new_state;
|
| /external/skia/experimental/nanomsg/ |
| picture_demo.cpp | 2 #include "nanomsg/src/pipeline.h"
|
| /external/skia/include/core/ |
| SkColorFilter.h | 21 * ColorFilters are optional objects in the drawing pipeline. When present in
|
| /external/skia/include/gpu/ |
| GrProcessor.h | 51 /** Provides custom shader code to the Ganesh shading pipeline. GrProcessor objects *must* be
|
| /external/sonivox/arm-hybrid-22k/lib_src/ |
| ARM-E_interpolate_noloop_gnu.s | 84 ADD tmp2, phaseIncrement, phaseFrac @ increment pointer here to avoid pipeline stall
|
| /external/sonivox/arm-wt-22k/lib_src/ |
| ARM-E_interpolate_noloop_gnu.s | 84 ADD tmp2, phaseIncrement, phaseFrac @ increment pointer here to avoid pipeline stall
|
| /external/v8/src/compiler/ |
| linkage.cc | 10 #include "src/compiler/pipeline.h"
|
| /external/vixl/src/vixl/a64/ |
| cpu-a64.cc | 158 // Ensure that any instructions already in the pipeline are discarded and
|
