HomeSort by relevance Sort by last modified time
    Searched full:pshufb (Results 51 - 75 of 92) sorted by null

1 23 4

  /external/boringssl/src/crypto/sha/asm/
sha256-586.pl 551 &pshufb (@MSG[0],$TMP);
557 &pshufb (@MSG[1],$TMP);
566 &pshufb (@MSG[2],$TMP);
575 &pshufb (@MSG[3],$TMP);
690 &pshufb (@X[0],$t3);
692 &pshufb (@X[1],$t3);
694 &pshufb (@X[2],$t3);
697 &pshufb (@X[3],$t3);
    [all...]
sha512-x86_64.pl 572 pshufb $TMP,@MSG[0]
577 pshufb $TMP,@MSG[1]
587 pshufb $TMP,@MSG[2]
596 pshufb $TMP,@MSG[3]
800 pshufb $t3,@X[0]
803 pshufb $t3,@X[1]
806 pshufb $t3,@X[2]
809 pshufb $t3,@X[3]
854 '&pshufb ($t3,$t4)', # sigma1(X[14..15])
864 '&pshufb ($t3,$t5)'
    [all...]
sha512-586.pl 473 &pshufb (@X[0],@X[1]);
481 &pshufb (@X[1],@X[2]) if ($j<7);
625 &pshufb (@X[0],@X[1]);
636 &pshufb (@X[1],@X[2]) if ($j<7);
  /external/clang/test/CodeGen/
mmx-builtins.c 51 // CHECK: pshufb
  /external/llvm/test/CodeGen/X86/
ssse3-intrinsics-x86.ll 92 ; CHECK: pshufb
vector-zext.ll 444 ; SSSE3-NEXT: pshufb {{.*#+}} xmm1 = xmm1[0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u]
449 ; SSSE3-NEXT: pshufb {{.*#+}} xmm1 = xmm1[4],zero,zero,zero,xmm1[5],zero,zero,zero,xmm1[6],zero,zero,zero,xmm1[7],zero,zero,zero
455 ; SSE41-NEXT: pshufb {{.*#+}} xmm1 = xmm1[0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u]
457 ; SSE41-NEXT: pshufb {{.*#+}} xmm1 = xmm1[4],zero,zero,zero,xmm1[5],zero,zero,zero,xmm1[6],zero,zero,zero,xmm1[7],zero,zero,zero
combine-64bit-vec-binop.ll 117 ; CHECK-NEXT: pshufb
psubus.ll 90 ; SSSE3-NEXT: pshufb {{.*#+}} xmm0 = xmm0[0,1,0,1,0,1,0,1,0,1,0,1,0,1,0,1]
198 ; SSSE3-NEXT: pshufb %xmm1, %xmm0
  /external/mesa3d/src/gallium/auxiliary/util/
u_sse.h 182 __asm__("pshufb %1, %0"
  /external/valgrind/none/tests/amd64/
insn_ssse3.def 183 pshufb mm.ub[14,6,4,3,1,0,255,128] mm.ub[50,51,52,53,54,55,56,57] => 1.ub[56,56,54,53,51,50,0,0]
184 pshufb m64.ub[14,6,4,3,1,0,255,128] mm.ub[50,51,52,53,54,55,56,57] => 1.ub[56,56,54,53,51,50,0,0]
186 pshufb xmm.ub[63,31,15,14,8,7,1,0,255,128,127,126,123,231,213,103] xmm.ub[60,61,62,63,64,65,66,67,70,71,72,73,74,75,76,77] => 1.ub[77,77,77,76,70,67,61,60,0,0,77,76,73,0,0,67]
187 pshufb m128.ub[63,31,15,14,8,7,1,0,255,128,127,126,123,231,213,103] xmm.ub[60,61,62,63,64,65,66,67,70,71,72,73,74,75,76,77] => 1.ub[77,77,77,76,70,67,61,60,0,0,77,76,73,0,0,67]
  /external/valgrind/none/tests/x86/
insn_ssse3.def 183 pshufb mm.ub[14,6,4,3,1,0,255,128] mm.ub[50,51,52,53,54,55,56,57] => 1.ub[56,56,54,53,51,50,0,0]
184 pshufb m64.ub[14,6,4,3,1,0,255,128] mm.ub[50,51,52,53,54,55,56,57] => 1.ub[56,56,54,53,51,50,0,0]
186 pshufb xmm.ub[63,31,15,14,8,7,1,0,255,128,127,126,123,231,213,103] xmm.ub[60,61,62,63,64,65,66,67,70,71,72,73,74,75,76,77] => 1.ub[77,77,77,76,70,67,61,60,0,0,77,76,73,0,0,67]
187 pshufb m128.ub[63,31,15,14,8,7,1,0,255,128,127,126,123,231,213,103] xmm.ub[60,61,62,63,64,65,66,67,70,71,72,73,74,75,76,77] => 1.ub[77,77,77,76,70,67,61,60,0,0,77,76,73,0,0,67]
  /external/llvm/lib/Target/X86/
X86TargetTransformInfo.cpp 404 // The backend will expand it into the sequence 'pshufb + pshufb + or'.
423 {ISD::VECTOR_SHUFFLE, MVT::v8i16, 3}, // pshufb + pshufb + or
424 {ISD::VECTOR_SHUFFLE, MVT::v16i8, 3} // pshufb + pshufb + or
    [all...]
X86IntrinsicsInfo.h 210 X86_INTRINSIC_DATA(avx2_pshuf_b, INTR_TYPE_2OP, X86ISD::PSHUFB, 0),
    [all...]
X86ISelLowering.cpp     [all...]
X86InstrFragmentsSIMD.td 78 def X86pshufb : SDNode<"X86ISD::PSHUFB",
X86InstrMMX.td 553 defm MMX_PSHUFB : SS3I_binop_rm_int_mm<0x00, "pshufb", int_x86_ssse3_pshuf_b,
  /external/libvpx/libvpx/third_party/libyuv/source/
format_conversion.cc 23 // generate a selector mask useful for pshufb
  /external/mesa3d/src/gallium/auxiliary/gallivm/
lp_bld_swizzle.c 177 /* XXX: SSE3 has PSHUFB which should be better than bitmasks, but forcing
  /external/boringssl/src/crypto/aes/asm/
aesni-x86_64.pl 981 pshufb $bswap_mask,$iv
1016 pshufb $bswap_mask,$inout0
1069 pshufb $bswap_mask,$iv
    [all...]
  /external/libvpx/libvpx/vp8/common/x86/
idctllm_sse2.asm 47 ;pshufb
  /external/llvm/lib/Target/X86/Utils/
X86ShuffleDecode.cpp 272 // It is not an error for the PSHUFB mask to not be a vector of i8 because the
  /external/llvm/test/MC/Disassembler/X86/
x86-32.txt 31 # CHECK: pshufb
  /external/mesa3d/src/mesa/x86/
read_rgba_span_x86.S 121 /* These 9 instructions do what PSHUFB (if there were such an
  /hardware/intel/common/omx-components/videocodec/libvpx_internal/libvpx/vp8/common/x86/
idctllm_sse2.asm 47 ;pshufb
  /external/elfutils/src/libcpu/defs/
i386     [all...]

Completed in 861 milliseconds

1 23 4