| /external/llvm/lib/CodeGen/ |
| RegAllocGreedy.cpp | 59 SplitSpillMode("split-spill-mode", cl::Hidden,
60 cl::desc("Spill mode for splitting live ranges"),
219 float MaxWeight; ///< Maximum spill weight evicted.
731 // Never evict spill products. They cannot split or spill.
735 // register for it. This is indicated by an infinite spill weight. These
836 // hints, and only evict smaller spill weights.
[all...] |
| LiveStackAnalysis.cpp | 61 assert(Slot >= 0 && "Spill slot indice must be >= 0");
|
| PseudoSourceValue.cpp | 118 // Spill slots will not alias any LLVM IR value.
|
| /art/runtime/arch/mips64/ |
| quick_method_frame_info_mips64.h | 44 // F12 should not be necessary to spill, as A0 is always in use.
|
| /art/runtime/arch/x86_64/ |
| context_x86_64.cc | 45 DCHECK_EQ(1, POPCOUNT(frame_info.CoreSpillMask() & ~core_regs)); // Return address spill.
|
| /external/llvm/lib/Target/AArch64/ |
| AArch64RegisterInfo.h | 43 // value of 1 << 14. A value of 5 will choose to spill or split really
|
| /external/llvm/lib/Target/Hexagon/ |
| HexagonFrameLowering.cpp | 234 // We can only schedule double loads if we spill contiguous callee-saved regs
235 // For instance, we cannot scheduled double-word loads if we spill r24,
289 // We can only schedule double loads if we spill contiguous callee-saved regs
290 // For instance, we cannot scheduled double-word loads if we spill r24,
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| /external/llvm/lib/Target/Sparc/ |
| SparcSubtarget.cpp | 71 // 16 words for register window spill
|
| /external/llvm/test/CodeGen/ARM/ |
| crash-O0.ll | 7 ; This function would crash RegAllocFast because it tried to spill %CPSR.
|
| /external/llvm/test/CodeGen/SystemZ/ |
| frame-13.ll | 24 ; emergency spill slots at 160(%r15), the amount that we need to allocate
208 ; Repeat f2 in a case that needs the emergency spill slots (because all
244 ; And again with maximum register pressure. The only spill slots that the
246 ; The FP case needs to spill an extra register and is too dependent on
|
| frame-09.ll | 41 ; This function should require all GPRs but no other spill slots.
111 ; emergency spill slots at 160(%r11), so create a frame of size 524192
|
| /external/llvm/test/CodeGen/X86/ |
| stack-align.ll | 41 ; Use a call to force a spill.
|
| musttail-varargs.ll | 5 ; Test that we actually spill and reload all arguments in the variadic argument
7 ; spill around it. A simple adjustment should not require any XMM spills.
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| pr1505b.ll | 40 ; Spill returned value:
48 ; Spill returned value:
|
| /external/mesa3d/src/gallium/drivers/nv50/codegen/ |
| nv50_ir_ra.cpp | 285 void spill(Instruction *defi, Value *slot, LValue *);
707 SpillCodeInserter& spill; member in class:nv50_ir::GCRA
993 GCRA::GCRA(Function *fn, SpillCodeInserter& spill) :
996 spill(spill)
1153 (node->degree < node->degreeLimit) ? "" : "(spill)");
1171 // spill candidate
1180 ERROR("no viable spill candidates left\n");
1436 SpillCodeInserter::spill(Instruction *defi, Value *slot, LValue *lval) function in class:nv50_ir::SpillCodeInserter
[all...] |
| /frameworks/support/v17/leanback/res/values-nb/ |
| strings.xml | 27 <string name="lb_playback_controls_play" msgid="731953341987346903">"Spill av"</string>
|
| /prebuilts/gcc/linux-x86/host/x86_64-w64-mingw32-4.8/lib/gcc/x86_64-w64-mingw32/4.8.3/plugin/include/ |
| emit-rtl.h | 47 /* Set the attributes for MEM appropriate for a spill slot. */
|
| /prebuilts/sdk/current/support/v17/leanback/res/values-nb/ |
| strings.xml | 27 <string name="lb_playback_controls_play" msgid="731953341987346903">"Spill av"</string>
|
| /art/compiler/dwarf/ |
| debug_frame_opcode_writer.h | 70 // Common alias in assemblers - spill relative to current stack pointer.
80 // Custom alias - spill many registers based on bitmask.
|
| /external/libunwind/include/ |
| libunwind-dynamic.h | 64 UNW_DYN_SPILL_FP_REL, /* frame-pointer-relative register spill */
65 UNW_DYN_SPILL_SP_REL, /* stack-pointer-relative register spill */
|
| /external/llvm/docs/CommandGuide/ |
| lli.rst | 187 **-disable-spill-fusing**
189 Disable fusing of spill code into instructions.
|
| /external/llvm/include/llvm/CodeGen/ |
| LiveRangeEdit.h | 1 //===---- LiveRangeEdit.h - Basic tools for split and spill -----*- C++ -*-===//
216 /// as currently those new intervals are not guaranteed to spill.
|
| /external/llvm/test/CodeGen/Mips/ |
| no-odd-spreg-msa.ll | 17 ; avoid the spill/reload.
51 ; avoid the spill/reload.
|
| /external/llvm/test/CodeGen/PowerPC/ |
| sjlj.ll | 74 ; CHECK-DAG: std [[REGA]], [[OFF:[0-9]+]](31) # 8-byte Folded Spill
139 ; CHECK-DAG: std [[REGB]], [[OFF:[0-9]+]](31) # 8-byte Folded Spill
|
| /external/v8/src/compiler/ |
| linkage.h | 212 // Get the frame offset for a given spill slot. The location depends on the
214 // architecture-specific. Negative spill slots indicate arguments on the
|
