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  /external/llvm/lib/CodeGen/
SplitKit.h 227 /// it to overlap the other intervals. If it is going to spill anyway, no
259 /// The current spill mode, selected by reset().
292 /// LiveRangeCalc instance for the complement interval when in spill mode.
295 /// getLRCalc - Return the LRCalc to use for RegIdx. In spill mode, the
297 /// LRCalc instance. When not in spill mode, all intervals can share one.
333 /// way that minimizes code size. This implements the SM_Size spill mode.
SplitKit.cpp 334 // Reset the LiveRangeCalc instances needed for this spill mode.
546 // In spill mode, make live ranges as short as possible by inserting the copy
616 // Spill modes
    [all...]
  /external/llvm/lib/Target/ARM/
ThumbRegisterInfo.cpp 408 // If this is a thumb spill / restore, we will be using a constpool load to
443 /// saveScavengerRegister - Spill the register so it can be used by the
454 // Thumb1 can't use the emergency spill slot on the stack because
532 // means the stack pointer cannot be used to access the emergency spill slot
537 "Cannot use SP to access the emergency spill slot in "
540 "Cannot use SP to access the emergency spill slot in "
ARMBaseRegisterInfo.cpp 309 // emergency spill slot.
537 // Assume that we'll have at least some spill slots allocated.
540 Offset += 128; // 128 bytes of spill slots
709 // means the stack pointer cannot be used to access the emergency spill slot
714 "Cannot use SP to access the emergency spill slot in "
717 "Cannot use SP to access the emergency spill slot in "
Thumb1FrameLowering.cpp 111 // Determine the sizes of each callee-save spill areas and record which frame
112 // belongs to which callee-save spill areas.
174 // Determine starting offsets of spill areas.
355 // Move SP to start of FP callee save spill area.
  /packages/apps/Dialer/res/values-nb/
strings.xml 41 <string name="notification_action_voicemail_play" msgid="6113133136977996863">"Spill av"</string>
68 <string name="description_playback_start_stop" msgid="5060732345522492292">"Spill av eller stopp avspillingen"</string>
100 <string name="description_call_log_play_button" msgid="651182125650429846">"Spill av talemelding"</string>
168 <string name="description_voicemail_play" msgid="2689369874037785439">"Spill av talemelding fra <xliff:g id="NAMEORNUMBER">^1</xliff:g>"</string>
185 <string name="voicemail_play_faster" msgid="3444751008615323006">"Spill av raskere."</string>
186 <string name="voicemail_play_slower" msgid="4544796503902818832">"Spill av saktere."</string>
  /art/runtime/entrypoints/quick/
quick_trampoline_entrypoints.cc 50 // | arg3 spill | | Caller's frame
51 // | arg2 spill | |
52 // | arg1 spill | |
85 // | arg3 spill | | Caller's frame
86 // | arg2 spill | |
87 // | arg1 spill | |
122 // | arg3 spill | | Caller's frame
123 // | arg2 spill | |
124 // | arg1 spill | |
150 // | arg3 spill | | Caller's fram
    [all...]
  /external/llvm/include/llvm/Target/
TargetRegisterInfo.h 562 /// requirements, and there is no register class with a smaller spill size
628 /// legal to use in the current sub-target and has the same spill size.
731 /// frame pointer based accesses to spill to the scavenger emergency spill
750 /// hasReservedSpillSlot - Return true if target has reserved a spill slot in
753 /// reserved as its spill slot. This tells PEI not to create a new stack frame
    [all...]
  /external/llvm/test/CodeGen/ARM/
fast-isel-intrinsic.ll 56 ; ARM: str r0, [sp[[SLOT:[, #0-9]*]]] @ 4-byte Spill
72 ; THUMB: str r0, [sp[[SLOT:[, #0-9]*]]] @ 4-byte Spill
109 ; THUMB: str r0, [sp[[SLOT:[, #0-9]*]]] @ 4-byte Spill
2010-05-20-NEONSpillCrash.ll 3 ; This test would crash the rewriter when trying to handle a spill after one of
  /external/valgrind/docs/internals/
register-uses.txt 80 r30 y altivec spill temporary
162 x21 is the GSP. x9 is a scratch chaining/spill temp. Neither
236 r30 y altivec spill temporary
  /system/core/libpixelflinger/codeflinger/
GGLAssembler.h 130 class Spill
133 Spill(RegisterFile& regFile, ARMAssemblerInterface& gen, uint32_t reglist)
152 ~Spill() {
  /external/llvm/lib/Target/X86/
README-X86-64.txt 172 1. We shouldn't spill the XMM registers because we only call va_arg with "int".
179 1. Conversely to the above, we shouldn't spill general registers if we only
  /external/v8/src/arm/
lithium-gap-resolver-arm.cc 13 // We use the root register to spill a value while breaking a cycle in parallel
95 // offsets (more than 1K or 4K) require us to spill this spilled value to
  /external/v8/src/
bailout-reason.h 185 V(kNotEnoughSpillSlotsForOsr, "Not enough spill slots for OSR") \
246 V(kTooManySpillSlotsNeededForOSR, "Too many spill slots needed for OSR") \
  /packages/apps/Gallery/res/values-nb/
strings.xml 59 <string name="camera_play" msgid="8248000517869959980">"Spill"</string>
66 <string name="video_play" msgid="5287787282508002895">"Spill"</string>
  /packages/apps/Music/res/values-bn-rBD/
strings.xml 38 <string name="play_all" msgid="6309622568869321842">"Spill alle"</string>
99 <string name="play_selection" msgid="2854921021814550018">"Spill"</string>
  /packages/apps/Music/res/values-nb/
strings.xml 38 <string name="play_all" msgid="6309622568869321842">"Spill alle"</string>
99 <string name="play_selection" msgid="2854921021814550018">"Spill"</string>
  /art/runtime/arch/x86/
context_x86.cc 45 DCHECK_EQ(1, POPCOUNT(frame_info.CoreSpillMask() & ~core_regs)); // Return address spill.
  /external/llvm/docs/HistoricalNotes/
2003-06-26-Reoptimizer2.txt 39 There is a problem with alloca: we cannot find our spill space for
  /external/llvm/lib/Target/AArch64/
AArch64RegisterInfo.cpp 235 // to the stack pointer, so only put the emergency spill slot next to the
295 // Assume that we'll have at least some spill slots allocated.
298 Offset += 128; // 128 bytes of spill slots
403 "Emergency spill slot is out of reach");
  /external/llvm/lib/Target/Hexagon/
HexagonTargetMachine.cpp 163 // Expand Spill code for predicate registers.
  /external/llvm/lib/Target/Mips/
MipsMachineFunction.h 142 /// FrameIndex for expanding BuildPairF64 nodes to spill and reload when the
  /external/llvm/lib/Target/SystemZ/
README.txt 173 We might want to model all access registers and use them to spill
  /external/llvm/test/CodeGen/AArch64/
arm64-spill-lr.ll 5 ; this will cause processFunctionBeforeCalleeSavedScan() to spill LR as an additional scratch

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