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  /external/llvm/lib/Target/Mips/
Mips16FrameLowering.cpp 120 // It's killed at the spill, unless the register is RA and return address
MipsFrameLowering.cpp 120 // callee-saved spill.
  /external/llvm/lib/Target/R600/
SIPrepareScratchRegs.cpp 98 // No SGPR is available, we must spill.
AMDKernelCodeT.h 320 /// Scratch Wave Offset as an offset, to access the Private/Spill/Arg
442 /// dispatch scratch base. Must be used as an offset with Private/Spill/Arg
562 /// The amount of memory required for the combined private, spill
    [all...]
  /external/llvm/lib/Target/X86/AsmParser/
X86AsmInstrumentation.cpp 55 // to spill both registers before instrumentation code and restore them
59 // PUSH AddressReg # spill AddressReg
60 // PUSH ShadowReg # spill ShadowReg
82 // RCX are checked. In this case there're no need to spill and restore
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  /external/llvm/lib/Target/X86/
README-FPStack.txt 64 folding spill code into the instructions.
  /external/llvm/test/CodeGen/SystemZ/
fp-conv-02.ll 73 ; Test a case where we spill the source of at least one LDEBR. We want
fp-conv-03.ll 91 ; Test a case where we spill the source of at least one LXEBR. We want
fp-conv-04.ll 91 ; Test a case where we spill the source of at least one LXDBR. We want
fp-sqrt-01.ll 76 ; Test a case where we spill the source of at least one SQEBR. We want
fp-sqrt-02.ll 76 ; Test a case where we spill the source of at least one SQDBR. We want
  /external/llvm/test/CodeGen/Thumb2/
crash.ll 53 ; Make sure the DPair register class can spill.
  /external/llvm/test/CodeGen/X86/
2012-01-10-UndefExceptionEdge.ll 11 ; so the return value can spill.
stackmap.ll 304 ; Spill a subregister stackmap operand.
311 ; Check that the subregister operand is a 4-byte spill.
344 ; we expect the register to be encoded with the proper size and spill offset. We don't know which
  /art/compiler/dex/quick/arm/
call_arm.cc 415 /* Spill core callee saves */
424 // kThumb2Push cannot be used to spill a single register.
432 /* Need to spill any FP regs? */
  /art/runtime/
stack.h 522 * spill or Method* in bytes using Method*.
541 * | core callee-save spill | {variable sized}
543 * | fp callee-save spill |
  /external/llvm/include/llvm/CodeGen/
RegAllocPBQP.h 32 /// @brief Spill option index.
488 // node exists then the node with the lowest spill-cost:degree ratio is
515 // Conservatively allocatable nodes will never spill. For now just
FunctionLoweringInfo.h 92 /// used to spill values at a statepoint. We store them here to enable
  /external/llvm/lib/CodeGen/
SjLjEHPrepare.cpp 274 /// edge and spill them.
330 DEBUG(dbgs() << "SJLJ Spill: " << *Inst << " around "
337 // If we decided we need a spill, do it.
  /external/llvm/utils/TableGen/
CodeGenRegisters.h 339 // 2. The RC spill size must not be smaller than our spill size.
340 // 3. RC spill alignment must be compatible with ours.
  /external/v8/src/compiler/x64/
code-generator-x64.cc 135 // The linkage computes where all spill slots are located.
841 // Remove this frame's spill slots first.
893 // Spill on demand to use a temporary register for memory-to-memory
  /external/valgrind/VEX/priv/
host_generic_regs.h 97 needed to spill each class of register. It allocates the following
466 /* Return insn(s) to spill/restore a real reg to a spill slot
  /packages/apps/Messaging/res/values-nb/
strings.xml 40 <string name="mediapicker_cameraChooserDescription" msgid="8498255650058981250">"Ta bilder eller spill inn video"</string>
42 <string name="mediapicker_audioChooserDescription" msgid="3660616501040372452">"Spill inn lyd"</string>
49 <string name="mediapicker_audio_title" msgid="5455016591560739789">"Spill inn lyd"</string>
203 <string name="audio_play_content_description" msgid="4932509227281251607">"Spill av lydvedlegg"</string>
317 <string name="video_thumbnail_view_play_button_content_description" msgid="3506938388391260811">"Spill av videoen"</string>
    [all...]
  /external/llvm/lib/Target/PowerPC/
README.txt 369 This is functional, but there is no reason to spill the LR register all the way
384 reg, it would ask "what is the best class to copy this into that I *can* spill"
386 register of that class. If it is then later necessary to spill that reg, so be
  /external/llvm/test/CodeGen/AArch64/
aarch64-dynamic-stack-layout.ll 347 ; spill slots
408 ; spill slots
459 ; spill slots

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