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  /external/llvm/lib/Target/MSP430/
MSP430FrameLowering.cpp 198 // Add the callee-saved register as live-in. It's killed at the spill.
  /external/llvm/lib/Target/NVPTX/
NVPTXPrologEpilogPass.cpp 185 // Then assign frame offsets to stack objects that are not used to spill
NVPTXTargetMachine.cpp 249 // which merges spill slots.
  /external/llvm/lib/Target/X86/
X86FrameLowering.cpp 501 ; Spill general-purpose registers
525 .seh_stackalloc (size of XMM spill slots)
526 .seh_setframe %rbp, SEHFrameOffset ; = size of all spill slots
530 ; Spill XMMs
    [all...]
  /external/llvm/test/CodeGen/Mips/
fp64a.ll 1 ; Test that the FP64A ABI performs double precision moves via a spill/reload.
  /external/llvm/test/CodeGen/Mips/msa/
spill.ll 1 ; Test that the correct instruction is chosen for spill and reload by trying
150 ; CHECK: st.b {{.*}} Spill
151 ; CHECK: st.b {{.*}} Spill
299 ; CHECK: st.h {{.*}} Spill
300 ; CHECK: st.h {{.*}} Spill
448 ; CHECK: st.w {{.*}} Spill
449 ; CHECK: st.w {{.*}} Spill
    [all...]
  /external/llvm/test/CodeGen/SystemZ/
bswap-02.ll 101 ; Test a case where we spill the source of at least one LRVR. We want
bswap-03.ll 101 ; Test a case where we spill the source of at least one LRVGR. We want
frame-04.ll 6 ; This function should require all FPRs, but no other spill slots.
frame-05.ll 5 ; This function should require all GPRs, but no other spill slots. The caller
frame-06.ll 7 ; This function should require all GPRs, but no other spill slots. The caller
int-conv-01.ll 107 ; Test a case where we spill the source of at least one LBR. We want
int-conv-02.ll 117 ; Test a case where we spill the source of at least one LLCR. We want
int-conv-03.ll 107 ; Test a case where we spill the source of at least one LGBR. We want
int-conv-04.ll 116 ; Test a case where we spill the source of at least one LLGCR. We want
int-conv-05.ll 142 ; Test a case where we spill the source of at least one LHR. We want
int-conv-06.ll 117 ; Test a case where we spill the source of at least one LLHR. We want
int-conv-07.ll 107 ; Test a case where we spill the source of at least one LGHR. We want
int-conv-08.ll 116 ; Test a case where we spill the source of at least one LLGHR. We want
  /external/llvm/test/CodeGen/X86/
dynamic-allocas-VLAs.ll 134 ; VLAs + Dynamic realignment + Spill
fold-pcmpeqd-2.ll 4 ; This testcase should need to spill the -1 value on both x86-32 and x86-64,
postra-licm.ll 5 ; Only linear scan needs this, -regalloc=greedy sinks the spill instead.
  /external/mesa3d/src/mesa/drivers/dri/i965/
brw_fs.h 175 uint32_t offset; /* spill/unspill offset */
brw_vec4.h 190 uint32_t offset; /* spill/unspill offset */
  /external/v8/src/
hydrogen-escape-analysis.cc 316 // spill slots might be uninitialized. Needs investigation.

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