/external/llvm/test/CodeGen/X86/ |
setjmp-spills.ll | 11 ; Test that llc avoids reusing spill slots in functions that call 20 ; spill slot. 39 ; Again, keep enough variables live that they need spill slots. Since 41 ; compiler should not reuse the spill slots. longjmp() can return to 42 ; where the first spill slots were still live.
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pmul.ll | 92 ; SSE2-NEXT: movaps %xmm1, {{[0-9]+}}(%rsp) # 16-byte Spill 93 ; SSE2-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill 110 ; SSE41-NEXT: movaps %xmm1, {{[0-9]+}}(%rsp) # 16-byte Spill 111 ; SSE41-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill 128 ; ALL-NEXT: movaps %xmm1, {{[0-9]+}}(%rsp) # 16-byte Spill 129 ; ALL-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill
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sink-cheap-instructions.ll | 7 ; CHECK: Spill 8 ; SINK-NOT: Spill
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2011-10-11-SpillDead.ll | 7 ; The call to @g forces a spill of that register.
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reghinting.ll | 4 ;; The registers %x and %y must both spill across the finit call.
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statepoint-stackmap-format.ll | 13 ; Do we see one spill for the local value and the store to the 73 ; Direct Spill Slot [RSP+0] 93 ; Direct Spill Slot [RSP+0] 98 ; Direct Spill Slot [RSP+0]
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/external/libunwind/tests/ |
ia64-test-nat-asm.S | 108 stf.spill [sp] = f2, -16 172 /* Spill r4 into memory and then save r5 in r4. */ 188 st8.spill [sp] = r4, -16 209 /* Spill r6 into memory and save primary ar.unat in a register. */ 225 st8.spill [sp] = r6, -16;; 246 /* Spill r6 into memory and save primary ar.unat in memory. */ 263 st8.spill [sp] = r6, -16;; 287 /* Spill r6 into memory and save primary ar.unat in register, 305 st8.spill [sp] = r6, -16;; 330 /* Spill r6 into memory and save primary ar.unat in register [all...] |
/external/llvm/include/llvm/CodeGen/ |
LiveStackAnalysis.h | 61 assert(Slot >= 0 && "Spill slot indice must be >= 0"); 68 assert(Slot >= 0 && "Spill slot indice must be >= 0"); 79 assert(Slot >= 0 && "Spill slot indice must be >= 0");
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/external/llvm/lib/Target/XCore/ |
XCoreMachineFunctionInfo.h | 68 assert(LRSpillSlotSet && "LR Spill slot not set"); 75 assert(FPSpillSlotSet && "FP Spill slot not set"); 82 assert(EHSpillSlotSet && "EH Spill slot not set");
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XCoreMachineFunctionInfo.cpp | 22 // isLargeFrame() is used when deciding if spill slots should be added to 27 // The arbitrary value of 0xf000 allows frames of up to ~240KB before spill
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/external/llvm/test/CodeGen/XCore/ |
llvm-intrinsics.ll | 154 ; FP: spill FP+SR+R0:1+R4:9 = entsp 2+2+6 155 ; But we dont actually spill or restore R0:1 176 ; !FP: spill R0:1+R4:10 = entsp 2+7 177 ; But we dont actually spill or restore R0:1 201 ; FP: spill FP+SR+R0:1+R4:9+LR = entsp 2+2+6 + extsp 1 202 ; But we dont actually spill or restore R0:1 226 ; !FP: spill R0:1+R4:10+LR = entsp 2+7+1 227 ; But we dont actually spill or restore R0:1 252 ; FP: spill FP+SR+R0:1+R4:9 = entsp 2+2+6 253 ; We dont spill R0: [all...] |
epilogue_prologue.ll | 8 ; FP + small frame: spill FP+SR = entsp 2 29 ; FP + small frame: spill FP+SR+R0+LR = entsp 3 + extsp 1 45 ; !FP + small frame: spill R0+LR = entsp 2 62 ; FP + large frame: spill FP+SR = entsp 2 + 100000 83 ; !FP + large frame: spill SR+SR = entsp 2 + 100000 102 ; FP + large frame: spill FP+SR+R4+LR = entsp 3 + 200000 + extsp 1 155 ; !FP + large frame: spill SR+SR+R4+LR = entsp 4 + 200000 209 ; FP + large frame: spill FP+SR+LR = entsp 2 + 256 + extsp 1 223 ; !FP + large frame: spill SR+SR+LR = entsp 3 + 256 237 ; FP + large frame: spill FP+SR+LR = entsp 2 + 32768 + extsp [all...] |
/external/v8/test/mjsunit/regress/ |
regress-crbug-173907b.js | 36 %NeverOptimizeFunction(spill); 37 function spill() { function 45 spill(); // At this point initial values for phi1 and phi2 are spilled.
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/external/llvm/lib/Target/R600/ |
SIMachineFunctionInfo.h | 58 void setHasSpilledVGPRs(bool Spill = true) { HasSpilledVGPRs = Spill; }
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/external/llvm/lib/Target/X86/ |
X86CompilationCallback_Win64.asm | 24 ; WARNING: We cannot use register spill area - we're generating stubs by hands! 33 ; Save all XMM arg registers. Also allocate reg spill area.
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/external/llvm/test/CodeGen/ARM/ |
2010-05-18-LocalAllocCrash.ll | 3 ;; This test would spill %R4 before the call to zz, but it forgot to move the 4 ; 'last use' marker to the spill.
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/external/llvm/test/MC/Mips/ |
elf-N64.s | 34 sd $ra, 8($sp) # 8-byte Folded Spill 35 sd $gp, 0($sp) # 8-byte Folded Spill
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r-mips-got-disp.s | 27 sd $ra, 8($sp) # 8-byte Folded Spill 28 sd $gp, 0($sp) # 8-byte Folded Spill
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/external/llvm/lib/CodeGen/ |
SpillPlacement.cpp | 1 //===-- SpillPlacement.cpp - Optimal Spill Code Placement -----------------===// 10 // This file implements the spill code placement analysis. 24 // The energy function represents the expected spill code execution frequency, 47 INITIALIZE_PASS_BEGIN(SpillPlacement, "spill-code-placement", 48 "Spill Code Placement Analysis", true, true) 51 INITIALIZE_PASS_END(SpillPlacement, "spill-code-placement", 52 "Spill Code Placement Analysis", true, true) 74 /// BiasN - Sum of blocks that prefer a spill. 99 /// mustSpill - Return True if this node is so biased that it must spill. 101 // We must spill if Bias < -sum(weights) or the MustSpill flag was set [all...] |
InlineSpiller.cpp | 54 static cl::opt<bool> DisableHoisting("disable-spill-hoist", cl::Hidden, 55 cl::desc("Disable inline spill hoisting")); 72 // Variables that are valid during spill(), but used by multiple methods. 78 // All registers to spill to StackSlot, including the main register. 92 // True when all reaching defs were reloads: No spill is necessary. 101 // The preferred register to spill. 152 void spill(LiveRangeEdit &) override; 203 // When spilling a virtual register, we also spill any snippets it is connected 209 // spill slots which can be important in tight loops. 234 // %Reg = COPY %snip / SPILL %snip, fi 1370 void InlineSpiller::spill(LiveRangeEdit &edit) { function in class:InlineSpiller [all...] |
/art/compiler/jni/quick/x86_64/ |
calling_convention_x86_64.cc | 106 // We spill the argument registers on X86 to free them up for scratch use, we then assume 115 ManagedRegisterSpill spill(in_reg, size, spill_offset); 116 entry_spills_.push_back(spill); 156 // Plus return value spill area size
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/art/runtime/arch/arm/ |
jni_entrypoints_arm.S | 24 push {r0, r1, r2, r3, lr} @ spill regs
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/art/test/528-long-hint/src/ |
Main.java | 30 getUnsafe(); // spill offset
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/external/llvm/test/CodeGen/AArch64/ |
arm64-platform-reg.ll | 22 ; CHECK-RESERVE-X18: Spill
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/external/llvm/test/CodeGen/SPARC/ |
spillsize.ll | 7 ; Both must use 8-byte spill and fill instructions.
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