| /art/compiler/dex/quick/mips/ |
| mips_lir.h | 82 * | spill region | {variable sized - will include lr if non-leaf.}
[all...] |
| /art/compiler/optimizing/ |
| nodes.cc | 248 // loop phi spill slots (which are not written to at back edge).
[all...] |
| code_generator_mips64.cc | 454 // Else, spill V0 (arbitrary choice) and use it as a scratch register (it will be
505 // Spill callee-saved registers.
[all...] |
| /external/kernel-headers/original/uapi/linux/ |
| firewire-cdev.h | 291 * A packet near the end of a buffer chunk will typically spill over into the
[all...] |
| /external/llvm/lib/Target/ARM/ |
| README.txt | 23 to spill these to a 8-bit or 16-bit stack slot, zero or sign extending as part
|
| /external/llvm/lib/Target/SystemZ/ |
| SystemZInstrInfo.cpp | 819 // might be equal. We don't worry about that case here, because spill slot
[all...] |
| /external/llvm/lib/Target/X86/ |
| X86RegisterInfo.cpp | 153 // Don't return a super-class that would shrink the spill size.
|
| /external/valgrind/massif/ |
| ms_print.in | 548 # The final snapshot will spill over into the n+1th column, which
|
| /prebuilts/gcc/linux-x86/host/x86_64-linux-glibc2.15-4.8/sysroot/usr/include/linux/ |
| firewire-cdev.h | 287 * A packet near the end of a buffer chunk will typically spill over into the
[all...] |
| /external/llvm/lib/Target/AArch64/ |
| AArch64InstrInfo.cpp | [all...] |
| /external/llvm/test/CodeGen/X86/ |
| stack-folding-fp-sse42.ll | 8 ; By including a nop call with sideeffects we can force a partial register spill of the
[all...] |
| /prebuilts/android-emulator/linux-x86_64/lib/gles_mesa/ |
| libGL.so | |
| libGL.so.1 | |
| libosmesa.so | |
| /external/valgrind/VEX/priv/ |
| host_arm64_defs.c | 85 // X9 is a chaining/spill temporary, not available to regalloc.
116 // x9 is used as a spill/reload/chaining/call temporary
[all...] |
| host_ppc_defs.c | 104 // GPR30 is reserved as AltiVec spill reg temporary
109 the occasional extra spill instead. */
[all...] |
| host_tilegx_isel.c | 345 /* None of these insns, including any spill code that might
[all...] |
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| LegalizeDAG.cpp | 91 /// is necessary to spill the vector being inserted into to memory, perform
566 /// is necessary to spill the vector being inserted into to memory, perform
575 // If the target doesn't support this, we have to spill the input vector
[all...] |
| /art/compiler/dex/quick/ |
| codegen_util.cc | [all...] |
| /art/runtime/arch/mips/ |
| quick_entrypoints_mips.S | 503 addiu $sp, $sp, -16 # spill s0, s1, fp, ra
[all...] |
| /external/llvm/include/llvm/Target/ |
| Target.td | 164 // Size - Specify the spill size in bits of the registers. A default value of
[all...] |
| TargetInstrInfo.h | 202 /// Not all subregisters have computable spill slots. For example,
[all...] |
| /external/skia/src/gpu/ |
| SkGpuDevice.cpp | [all...] |
| /external/v8/src/ |
| frames.cc | 667 // Visit pointer spill slots and locals.
[all...] |
| /packages/apps/TvSettings/Settings/res/values-nb/ |
| strings.xml | [all...] |
