/external/libhevc/common/arm/ |
ihevc_sao_edge_offset_class3.s | 104 SUBS r9,r9,#8 @Decrement the loop count by 8 268 SUBS r4,r4,#1 @decrement the loop count 541 SUBS r8,r8,#4 545 SUBS r6,r6,#16 @Decrement the wd loop count by 16 594 SUBS r4,r4,#1 @decrement the loop count [all...] |
ihevc_sao_edge_offset_class3_chroma.s | 112 SUBS r9,r9,#8 @Decrement the loop count by 8 343 SUBS r4,r4,#1 @decrement the loop count [all...] |
ihevc_intra_pred_chroma_mode_18_34.s | 151 subs r12,r12,#8
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ihevc_padding.s | 144 subs r2,#4 263 subs r2,#4 385 subs r2,#4 511 subs r2,#4
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ihevc_sao_band_offset_chroma.s | 93 SUBS r11,r11,#1 @Decrement the loop counter 119 SUBS r11,r11,#8 @Decrement the loop counter by 8 313 SUBS r11,r11,#4 @Decrement the ht loop count by 4 374 SUBS r10,r10,#4 @Decrement the ht loop count by 4
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ihevc_sao_edge_offset_class0.s | 107 SUBS r12,r12,#8 @Decrement the loop counter by 8 193 SUBS r4,r4,#1 @Decrement row by 1 258 SUBS r8,r8,#16 @Decrement column by 16 336 SUBS r4,r4,#1 @Decrement row by 1
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/external/libhevc/common/arm64/ |
ihevc_sao_edge_offset_class3.s | 109 SUBS x9,x9,#8 //Decrement the loop count by 8 286 SUBS x4,x4,#1 //decrement the loop count 561 SUBS x8,x8,#4 565 SUBS x6,x6,#16 //Decrement the wd loop count by 16 616 SUBS x4,x4,#1 //decrement the loop count [all...] |
ihevc_intra_pred_luma_vert.s | 136 subs x4, x4, #8 149 subs x4, x4, #8 248 subs x4, x4,#8 286 subs x4, x4, #4
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ihevc_padding.s | 139 subs x2, x2,#4 257 subs x2, x2,#4 378 subs x2, x2,#4 503 subs x2, x2,#4
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/external/libvpx/libvpx/vp8/encoder/arm/armv5te/ |
vp8_packtokens_mbrow_armv5.asm | 182 subs r8, r8, #1 ; --n 275 subs r8, r8, #1 ; --n 333 subs r6, r6, #1
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/frameworks/base/packages/SystemUI/tests/src/com/android/systemui/statusbar/policy/ |
NetworkControllerBaseTest.java | 123 List<SubscriptionInfo> subs = new ArrayList<SubscriptionInfo>(); local 127 subs.add(subscription); 129 when(mMockSm.getActiveSubscriptionInfoList()).thenReturn(subs);
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/hardware/intel/common/omx-components/videocodec/libvpx_internal/libvpx/vp8/encoder/arm/armv5te/ |
vp8_packtokens_mbrow_armv5.asm | 182 subs r8, r8, #1 ; --n 275 subs r8, r8, #1 ; --n 333 subs r6, r6, #1
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/bionic/libc/arch-arm/cortex-a15/bionic/ |
strcmp.S | 125 subs sp, sp, #16 207 subs ip, r3, ip 214 subs ip, r3, ip 221 subs ip, r3, ip
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/bionic/libc/arch-arm/krait/bionic/ |
strcmp.S | 125 subs sp, sp, #16 207 subs ip, r3, ip 214 subs ip, r3, ip 221 subs ip, r3, ip
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/bionic/libm/arm/ |
s_floor.S | 43 subs r2, r2, #0x3 /* r2 <- exp */
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/external/libmpeg2/common/armv8/ |
impeg2_format_conv.s | 179 subs x5, x5, #1 231 subs x5, x5, #1 352 subs x5, x5, #1 402 subs x5, x5, #1
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/external/libvpx/libvpx/vp8/common/arm/armv6/ |
vp8_sad16x16_armv6.asm | 85 subs r5, r5, #1 ; decrement loop counter
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vp8_variance8x8_armv6.asm | 86 subs r12, r12, #1 ; next row
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/external/libvpx/libvpx/vp8/encoder/arm/neon/ |
vp8_mse16x16_neon.asm | 53 subs r12, r12, #1
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/external/llvm/lib/Target/AArch64/ |
AArch64ConditionOptimizer.cpp | 53 // Currently only SUBS and ADDS followed by b.?? are supported. 152 // cmp is an alias for subs with a dead destination register. 191 // Changes opcode adds <-> subs considering register operand width. 254 // Change immediate in comparison instruction (ADDS or SUBS).
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/external/llvm/test/MC/Disassembler/ARM/ |
virtexts-thumb.txt | 47 # CHECK-NOVIRT: subs pc, lr, #0
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/external/sonivox/arm-hybrid-22k/lib_src/ |
ARM-E_mastergain_gnu.s | 94 SUBS nNumLoopSamples, nNumLoopSamples, #2
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/external/sonivox/arm-wt-22k/lib_src/ |
ARM-E_mastergain_gnu.s | 94 SUBS nNumLoopSamples, nNumLoopSamples, #2
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/external/tremolo/Tremolo/ |
mdctARM.s | 60 SUBS r1, r1, #16 @ r1 = r - post - 16 90 SUBS r1, r1, #16 105 SUBS r1, r1, #4 120 SUBS r1, r1, #16 @ r1 = ((post - l)>>1) - 4 158 SUBS r1, r1, #16 174 SUBS r1, r1, #4 194 SUBS r1, r3, r1 @ r1 = (r - post) 212 SUBS r1, r1, #4 233 SUBS r1, r1, r3 @ r1 = (post - r) 251 SUBS r1, r1, # [all...] |
mdctLARM.s | 58 SUBS r1, r1, #16 @ r1 = r - post - 16 88 SUBS r1, r1, #16 103 SUBS r1, r1, #4 118 SUBS r1, r1, #16 @ r1 = ((post - l)>>1) - 4 156 SUBS r1, r1, #16 172 SUBS r1, r1, #4 192 SUBS r1, r3, r1 @ r1 = (r - post) 211 SUBS r1, r1, #4 232 SUBS r1, r1, r3 @ r1 = (post - r) 252 SUBS r1, r1, # [all...] |