/external/llvm/test/Analysis/BasicAA/ |
cs-cs.ll | 40 tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %P, i8* %Q, i64 12, i32 1, i1 false) 41 tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %P, i8* %Q, i64 12, i32 1, i1 false) 47 ; CHECK: Both ModRef: Ptr: i8* %P <-> tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %P, i8* %Q, i64 12, i32 1, i1 false) 48 ; CHECK: Both ModRef: Ptr: i8* %Q <-> tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %P, i8* %Q, i64 12, i32 1, i1 false) 49 ; CHECK: Both ModRef: Ptr: i8* %P <-> tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %P, i8* %Q, i64 12, i32 1, i1 false) 50 ; CHECK: Both ModRef: Ptr: i8* %Q <-> tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %P, i8* %Q, i64 12, i32 1, i1 false) 51 ; CHECK: Both ModRef: tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %P, i8* %Q, i64 12, i32 1, i1 false) <-> tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %P, i8* %Q, i64 12, i32 1, i1 false) 52 ; CHECK: Both ModRef: tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %P, i8* %Q, i64 12, i32 1, i1 false) <-> tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %P, i8* %Q, i64 12, i32 1, i1 false [all...] |
/external/clang/test/CodeGen/ |
atomic-ops-libcall.c | 10 // CHECK: {{%[^ ]*}} = tail call i32 @__atomic_fetch_add_4(i8* {{%[0-9]+}}, i32 12, i32 5) 16 // CHECK: {{%[^ ]*}} = tail call i32 @__atomic_fetch_sub_4(i8* {{%[0-9]+}}, i32 20, i32 5) 22 // CHECK: {{%[^ ]*}} = tail call i32 @__atomic_fetch_add_4(i8* {{%[0-9]+}}, i32 3, i32 5) 28 // CHECK: {{%[^ ]*}} = tail call i32 @__atomic_fetch_sub_4(i8* {{%[0-9]+}}, i32 5, i32 5) 34 // CHECK: {{%[^ ]*}} = tail call i32 @__atomic_fetch_sub_4(i8* {{%[0-9]+}}, i32 4, i32 0)
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/external/icu/icu4c/source/layout/ |
LEInsertionList.cpp | 26 : head(NULL), tail(NULL), growAmount(0), append(rightToLeft) 28 tail = (InsertionRecord *) &head; 45 tail = (InsertionRecord *) &head; 74 tail->next = insertion; 75 tail = insertion;
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/external/javassist/src/main/javassist/bytecode/analysis/ |
IntQueue.java | 29 private IntQueue.Entry tail; field in class:IntQueue 33 if (tail != null) 34 tail.next = entry; 35 tail = entry; 52 tail = null;
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/external/llvm/test/CodeGen/AArch64/ |
arm64-rounding.ll | 10 %call = tail call float @floorf(float %a) nounwind readnone 21 %call = tail call double @floor(double %a) nounwind readnone 31 %call = tail call float @nearbyintf(float %a) nounwind readnone 41 %call = tail call double @nearbyint(double %a) nounwind readnone 52 %call = tail call float @ceilf(float %a) nounwind readnone 63 %call = tail call double @ceil(double %a) nounwind readnone 73 %call = tail call float @rintf(float %a) nounwind readnone 83 %call = tail call double @rint(double %a) nounwind readnone 94 %call = tail call float @truncf(float %a) nounwind readnone 105 %call = tail call double @trunc(double %a) nounwind readnon [all...] |
/external/llvm/test/CodeGen/X86/ |
tail-call-legality.ll | 3 ; This used to be classified as a tail call because of a mismatch in the 5 ; both return {i32, i32, i32} (since i64 is illegal) which is fine for a tail 9 ; straight through and the third is undef, also OK for a tail call. 13 ; FIXME: in principle we *could* support some tail calls involving truncations 23 %whole = tail call {i64, i32} @test()
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2009-06-12-x86_64-tail-call-conv-out-of-sync-bug.ll | 4 ; Check that x86-64 tail calls support x86_fp80 and v2f32 types. (Tail call 13 %tmp2 = tail call fastcc double @tailcallee( x86_fp80 %tmp, <2 x float> <float 1.000000e+00, float 1.000000e+00>)
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bswap-inline-asm.ll | 9 %asmtmp = tail call i64 asm "bswap $0", "=r,0,~{dirflag},~{fpsr},~{flags}"(i64 %x) nounwind 16 %asmtmp = tail call i64 asm "bswapq ${0:q}", "=r,0,~{dirflag},~{fpsr},~{flags}"(i64 %x) nounwind 23 %asmtmp = tail call i32 asm "bswapl ${0:q}", "=r,0,~{dirflag},~{fpsr},~{flags}"(i32 %x) nounwind 30 %asmtmp = tail call i16 asm "rorw $$8, ${0:w}", "=r,0,~{dirflag},~{fpsr},~{flags},~{cc}"(i16 %x) nounwind 37 %asmtmp = tail call i16 asm "rorw $$8, ${0:w}", "=r,0,~{cc},~{dirflag},~{fpsr},~{flags}"(i16 %x) nounwind 44 %asmtmp = tail call i16 asm "rolw $$8, ${0:w}", "=r,0,~{dirflag},~{fpsr},~{flags},~{cc}"(i16 %x) nounwind 51 %asmtmp = tail call i16 asm "rolw $$8, ${0:w}", "=r,0,~{cc},~{dirflag},~{fpsr},~{flags}"(i16 %x) nounwind 58 %asmtmp = tail call i32 asm "bswap $0", "=r,0,~{dirflag},~{fpsr},~{flags}"(i32 %x) nounwind 65 %asmtmp = tail call i32 asm "bswap $0", "=r,0,~{dirflag},~{flags},~{fpsr}"(i32 %x) nounwind 72 %asmtmp = tail call i32 asm "rorw $$8, ${0:w};rorl $$16, $0;rorw $$8, ${0:w}", "=r,0,~{cc},~{dirflag},~{flags},~{ (…) [all...] |
combine-sse2-intrinsics.ll | 8 %1 = tail call <4 x i32> @llvm.x86.sse2.psrai.d(<4 x i32> %A, i32 3) 9 %2 = tail call <4 x i32> @llvm.x86.sse2.psra.d(<4 x i32> %1, <4 x i32> <i32 3, i32 0, i32 7, i32 0>) 10 %3 = tail call <4 x i32> @llvm.x86.sse2.psrai.d(<4 x i32> %2, i32 2) 18 %1 = tail call <8 x i16> @llvm.x86.sse2.psrai.w(<8 x i16> %A, i32 3) 19 %2 = tail call <8 x i16> @llvm.x86.sse2.psra.w(<8 x i16> %1, <8 x i16> <i16 3, i16 0, i16 0, i16 0, i16 7, i16 0, i16 0, i16 0>) 20 %3 = tail call <8 x i16> @llvm.x86.sse2.psrai.w(<8 x i16> %2, i32 2) 28 %1 = tail call <4 x i32> @llvm.x86.sse2.psrai.d(<4 x i32> %A, i32 0) 29 %2 = tail call <4 x i32> @llvm.x86.sse2.psra.d(<4 x i32> %1, <4 x i32> <i32 0, i32 0, i32 7, i32 0>) 30 %3 = tail call <4 x i32> @llvm.x86.sse2.psrai.d(<4 x i32> %2, i32 0) 39 %1 = tail call <8 x i16> @llvm.x86.sse2.psrai.w(<8 x i16> %A, i32 0 [all...] |
ret-addr.ll | 6 %0 = tail call i8* @llvm.returnaddress(i32 2) ; <i8*> [#uses=1] 14 %0 = tail call i8* @llvm.returnaddress(i32 1) ; <i8*> [#uses=1] 20 %0 = tail call i8* @llvm.returnaddress(i32 0) ; <i8*> [#uses=1]
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rtm.ll | 9 %0 = tail call i32 @llvm.x86.xbegin() nounwind 18 tail call void @llvm.x86.xend() nounwind 26 tail call void @llvm.x86.xabort(i8 2)
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switch-order-weight.ll | 20 tail call void @unr(i32 23) noreturn nounwind 24 tail call void @bar(i32 42) nounwind 28 tail call void @unr(i32 5) noreturn nounwind
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x32-function_pointer-1.ll | 4 ; Test for x32 function pointer tail call 13 tail call void %0(i8* %h) nounwind 17 tail call void %1(i8* %h) nounwind
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/external/llvm/test/Transforms/ObjCARC/ |
contract-marker.ll | 4 ; CHECK: %call = tail call i32* @qux() 7 ; CHECK-NEXT: %0 = tail call i8* @objc_retainAutoreleasedReturnValue(i8* %tcall) [[NUW:#[0-9]+]] 12 %call = tail call i32* @qux() 14 %0 = tail call i8* @objc_retainAutoreleasedReturnValue(i8* %tcall) nounwind 15 tail call void @bar(i8* %0)
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contract.ll | 38 ; CHECK: tail call i8* @objc_retainAutorelease(i8* %x) [[NUW:#[0-9]+]] 42 %0 = tail call i8* @objc_retain(i8* %x) nounwind 51 ; CHECK: tail call i8* @objc_retainAutoreleaseReturnValue(i8* %x) [[NUW]] 55 %0 = tail call i8* @objc_retain(i8* %x) nounwind 56 tail call i8* @objc_autoreleaseReturnValue(i8* %0) nounwind 63 ; CHECK: tail call i8* @objc_retainAutorelease(i8* %x) [[NUW]] 68 tail call i8* @objc_retain(i8* %x) nounwind 86 tail call i8* @objc_retain(i8* %x) nounwind 89 tail call void @objc_release(i8* %x) nounwind 96 ; CHECK: tail call i8* @objc_retain(i8* %p) [[NUW] [all...] |
/external/mdnsresponder/mDNSShared/ |
GenLinkedList.c | 41 pList->Tail = NULL; 47 /* Add a linked list element to the tail of the list. */ 49 if ( pList->Tail) { 50 ASSIGNLINK( pList->Tail, elem, pList->LinkOffset); 55 pList->Tail = elem; 63 if ( pList->Tail == NULL) 64 pList->Tail = elem; 83 if ( pList->Tail == elem) 84 pList->Tail = lastElem ? lastElem : NULL; 116 if ( pList->Tail == elemInList [all...] |
/external/llvm/test/CodeGen/ARM/ |
tail-call-weak.ll | 9 ; tail calls on weak externals when targeting a COFF environment. 11 %call = tail call i8* @f() 12 %call1 = tail call i8* @g(i8* %call)
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/external/llvm/test/CodeGen/Hexagon/ |
tail-call-trunc.ll | 8 %res = tail call i32 @ret_i32() 16 %res = tail call i32 @ret_i32() 25 %res = tail call i64 @ret_i64()
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/external/llvm/test/CodeGen/Mips/ |
global-pointer-reg.ll | 18 tail call void @foo2(i32* @g0) nounwind 19 tail call void @foo2(i32* @g1) nounwind 20 tail call void @foo2(i32* @g2) nounwind
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gpreg-lazy-binding.ll | 13 tail call void @externalFunc() nounwind 14 tail call fastcc void @internalFunc() 33 tail call void %pf(i32 1)
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/external/llvm/test/CodeGen/PowerPC/ |
2008-03-05-RegScavengerAssert.ll | 7 %tmp2 = tail call i8* @bar( i32 14 ) nounwind ; <i8*> [#uses=0] 13 tail call void %tmp30( i8* null ) nounwind 16 tail call void %tmp38( ) nounwind
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/external/llvm/test/Transforms/GVN/ |
2011-09-07-TypeIdFor.ll | 33 %typeid.i = tail call i32 @llvm.eh.typeid.for(i8* bitcast (%struct.__fundamental_type_info_pseudo* @_ZTIi to i8*)) 39 %typeid1.i = tail call i32 @llvm.eh.typeid.for(i8* bitcast (%struct.__fundamental_type_info_pseudo* @_ZTIb to i8*)) 45 %3 = tail call i8* @__cxa_begin_catch(i8* %exc_ptr2.i) nounwind 46 tail call void @__cxa_end_catch() nounwind 50 %D.2073_5.i = tail call i8* @__cxa_begin_catch(i8* %exc_ptr2.i) nounwind 51 tail call void @__cxa_end_catch() nounwind 56 %typeid = tail call i32 @llvm.eh.typeid.for(i8* bitcast (%struct.__fundamental_type_info_pseudo* @_ZTIi to i8*)) 62 %typeid1 = tail call i32 @llvm.eh.typeid.for(i8* bitcast (%struct.__fundamental_type_info_pseudo* @_ZTIb to i8*)) 70 %6 = tail call i8* @__cxa_begin_catch(i8* %exc_ptr2.i) nounwind 71 tail call void @__cxa_end_catch() nounwin [all...] |
/external/llvm/test/Transforms/LICM/ |
2014-09-10-doFinalizationAssert.ll | 16 %iv = phi i32 [ 0, %outer ], [ %inc, %tail ] 19 br i1 true, label %outer.backedge, label %tail 21 tail:
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/external/llvm/test/CodeGen/SPARC/ |
inlineasm.ll | 7 %0 = tail call i32 asm sideeffect "add $2, $1, $0", "=r,r,r"(i32 %a, i32 %b) 15 %0 = tail call i32 asm sideeffect "add $1, $2, $0", "=r,r,rI"(i32 %a, i32 1023) 23 %0 = tail call i32 asm sideeffect "add $1, $2, $0", "=r,r,rI"(i32 %a, i32 -4096) 33 %0 = tail call i32 asm sideeffect "add $1, $2, $0", "=r,r,rI"(i32 %a, i32 10000) 42 %0 = tail call i64 asm sideeffect "ldda [$1] $2, $0", "={r2},r,n"(i32* %ptr, i32 43) 43 %1 = tail call i64 asm sideeffect "ldda [$1] $2, $0", "={g3},r,n"(i32* %ptr, i32 43)
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/external/clang/test/CodeGenOpenCL/ |
spir-calling-conv.cl | 11 // CHECK: %{{[a-z0-9_]+}} = tail call spir_func i32 @get_dummy_id(i32 0) 14 // CHECK: tail call spir_kernel void @bar(i32 addrspace(1)* %A)
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