| /external/google-breakpad/src/third_party/libdisasm/swig/ |
| libdisasm.i | 120 x86_op_list_node *head, *tail, *curr;
149 return list->tail;
164 list->curr = list->tail;
165 return list->tail;
185 if ( ! list->tail ) {
186 list->head = list->tail = node;
188 list->tail->next = node;
189 node->prev = list->tail;
190 list->tail = node;
270 x86_insn_list_node *head, *tail, *curr
[all...] |
| /external/llvm/test/CodeGen/ARM/ |
| returned-ext.ll | 25 %call = tail call i16 @identity16(i16 %x)
27 %call2 = tail call i32 @identity32(i32 %b)
59 %call = tail call i16 @retzext16(i16 %x)
61 %call2 = tail call i32 @identity32(i32 %b)
79 %call = tail call i16 @retzext16(i16 %x)
81 %call2 = tail call i32 @identity32(i32 %b)
99 %call = tail call i16 @paramzext16(i16 %x)
101 %call2 = tail call i32 @identity32(i32 %b)
102 %call3 = tail call i16 @paramzext16(i16 %call)
124 %call = tail call i16 @paramzext16(i16 %x
[all...] |
| 2008-05-19-ScavengerAssert.ll | 12 %tmp151 = tail call fastcc i32 @get_mem2Dint( i32*** getelementptr (%struct.Decoders, %struct.Decoders* @decoders, i32 0, i32 0), i32 16, i32 16 ) ; <i32> [#uses=1]
13 %tmp158 = tail call i8* @calloc( i32 0, i32 4 ) ; <i8*> [#uses=0]
|
| 2009-09-27-CoalescerBug.ll | 15 %2 = tail call arm_aapcs_vfpcc i64 @__fixunssfdi(float %1) nounwind ; <i64> [#uses=1]
20 %4 = tail call arm_aapcs_vfpcc i64 @__fixunssfdi(float %a) nounwind ; <i64> [#uses=1]
|
| call-noret-minsize.ll | 12 tail call void @bar() noreturn nounwind
23 tail call void @t1() noreturn nounwind
|
| call-noret.ll | 14 tail call void @bar() noreturn nounwind
27 tail call void @t1() noreturn nounwind
|
| /external/llvm/test/Transforms/TailCallElim/ |
| basic.ll | 8 ; Trivial case. Mark @noarg with tail call.
10 ; CHECK: tail call void @noarg()
15 ; PR615. Make sure that we do not move the alloca so that it interferes with the tail call.
22 ; CHECK: tail call i32 @test1
23 %X = tail call i32 @test1() ; <i32> [#uses=1]
62 ; Make sure that a nocapture pointer does not stop adding a tail call marker to
64 ; a tail call.
69 ; CHECK-NOT: tail call void @use_nocapture
70 ; CHECK: tail call void @noarg()
97 ; PR14143: Make sure that we do not mark functions with nocapture allocas with tail
[all...] |
| /external/llvm/test/CodeGen/AArch64/ |
| arm64-copy-tuple.ll | 16 %vec = tail call { <8 x i8>, <8 x i8> } @llvm.aarch64.neon.ld2.v8i8.p0v8i8(<8 x i8>* %addr_v8i8)
19 tail call void asm sideeffect "", "~{v2},~{v3},~{v4},~{v5},~{v6},~{v7},~{v8},~{v9},~{v10},~{v11},~{v12},~{v13},~{v14},~{v15},~{v16},~{v17},~{v18},~{v19},~{v20},~{v21},~{v22},~{v23},~{v24},~{v25},~{v26},~{v27},~{v28},~{v29},~{v30},~{v31}"()
20 tail call void @llvm.aarch64.neon.st2.v8i8.p0i8(<8 x i8> %vec0, <8 x i8> %vec1, i8* %addr)
22 tail call void asm sideeffect "", "~{v0},~{v3},~{v4},~{v5},~{v6},~{v7},~{v8},~{v9},~{v10},~{v11},~{v12},~{v13},~{v14},~{v15},~{v16},~{v17},~{v18},~{v19},~{v20},~{v21},~{v22},~{v23},~{v24},~{v25},~{v26},~{v27},~{v28},~{v29},~{v30},~{v31}"()
23 tail call void @llvm.aarch64.neon.st2.v8i8.p0i8(<8 x i8> %vec0, <8 x i8> %vec1, i8* %addr)
33 %vec = tail call { <8 x i8>, <8 x i8> } @llvm.aarch64.neon.ld2.v8i8.p0v8i8(<8 x i8>* %addr_v8i8)
36 tail call void asm sideeffect "", "~{v0},~{v3},~{v4},~{v5},~{v6},~{v7},~{v8},~{v9},~{v10},~{v11},~{v12},~{v13},~{v14},~{v15},~{v16},~{v17},~{v18},~{v19},~{v20},~{v21},~{v22},~{v23},~{v24},~{v25},~{v26},~{v27},~{v28},~{v29},~{v30},~{v31}"()
37 tail call void @llvm.aarch64.neon.st2.v8i8.p0i8(<8 x i8> %vec0, <8 x i8> %vec1, i8* %addr)
39 tail call void asm sideeffect "", "~{v2},~{v3},~{v4},~{v5},~{v6},~{v7},~{v8},~{v9},~{v10},~{v11},~{v12},~{v13},~{v14},~{v15},~{v16},~{v17},~{v18},~{v19},~{v20},~{v21},~{v22},~{v23},~{v24},~{v25},~{v26},~{v27},~{v28},~{v29},~{v30},~{v31}"()
40 tail call void @llvm.aarch64.neon.st2.v8i8.p0i8(<8 x i8> %vec0, <8 x i8> %vec1, i8* %addr
[all...] |
| arm64-returnaddr.ll | 8 %0 = tail call i8* @llvm.returnaddress(i32 0)
22 %0 = tail call i8* @llvm.returnaddress(i32 2)
|
| arm64-sqshl-uqshl-i64Contant.ll | 7 %1 = tail call i64 @llvm.aarch64.neon.sqshl.i64(i64 %a, i64 36)
14 %1 = tail call i64 @llvm.aarch64.neon.uqshl.i64(i64 %a, i64 36)
|
| regress-fp128-livein.ll | 10 %call3 = tail call i32 @g(fp128 %conv2)
11 %call8 = tail call i32 @h(double %conv6)
|
| returnaddr.ll | 7 %0 = tail call i8* @llvm.returnaddress(i32 0)
17 %0 = tail call i8* @llvm.returnaddress(i32 2)
|
| /external/clang/test/CXX/temp/temp.decls/temp.variadic/ |
| partial-ordering.cpp | 12 template<typename Head, typename ...Tail>
13 struct X1<tuple<Head, Tail...> > {
17 template<typename Head, typename ...Tail>
18 struct X1<tuple<Head, Tail&...> > {
22 template<typename Head, typename ...Tail>
23 struct X1<tuple<Head&, Tail&...> > {
|
| /external/llvm/test/CodeGen/Hexagon/ |
| ctlz-cttz-ctpop.ll | 9 %tmp0 = tail call i64 @llvm.ctlz.i64( i64 %a, i1 true )
10 %tmp1 = tail call i64 @llvm.cttz.i64( i64 %a, i1 true )
11 %tmp2 = tail call i32 @llvm.ctlz.i32( i32 %b, i1 true )
12 %tmp3 = tail call i32 @llvm.cttz.i32( i32 %b, i1 true )
13 %tmp4 = tail call i64 @llvm.ctpop.i64( i64 %a )
14 %tmp5 = tail call i32 @llvm.ctpop.i32( i32 %b )
|
| /external/llvm/test/CodeGen/X86/ |
| inline-asm.ll | 17 tail call void asm sideeffect "frob $0", "m"( float 0x41E0000000000000)
23 tail call void asm sideeffect "bork $0", "J"(i32 37) nounwind
30 %0 = tail call i32 asm "test", "=l,~{dirflag},~{fpsr},~{flags}"() nounwind
37 tail call void asm sideeffect "foo $0", "q,~{dirflag},~{fpsr},~{flags}"(i1 %desired) nounwind
43 %0 = tail call i8 asm sideeffect "xchg $0, $1", "=r,*m,0,~{memory},~{dirflag},~{fpsr},~{flags}"(i32* %p, i1 %desired) nounwind
59 %asm = tail call i32 asm sideeffect "", "={ax},i,~{eax},~{flags},~{rax}"(i64 61) nounwind
|
| sincos-opt.ll | 24 %call = tail call float @sinf(float %x) nounwind readnone
25 %call1 = tail call float @cosf(float %x) nounwind readnone
44 %call = tail call double @sin(double %x) nounwind readnone
45 %call1 = tail call double @cos(double %x) nounwind readnone
56 %call = tail call x86_fp80 @sinl(x86_fp80 %x) nounwind
57 %call1 = tail call x86_fp80 @cosl(x86_fp80 %x) nounwind
|
| sink-cheap-instructions.ll | 35 tail call void @_Z6assignPj(i32* %1)
39 tail call void @_Z6assignPj(i32* %2)
46 tail call void @_Z6assignPj(i32* %3)
50 tail call void @_Z6assignPj(i32* %4)
54 tail call void @_Z6assignPj(i32* %5)
58 tail call void @_Z6assignPj(i32* %6)
|
| switch-crit-edge-constant.ll | 38 %tmp8 = tail call i32 (i8*, ...) @printf( i8* %s.0 ) ; <i32> [#uses=0]
39 %tmp10 = tail call i32 (i8*, ...) @printf( i8* %s.0 ) ; <i32> [#uses=0]
40 %tmp12 = tail call i32 (i8*, ...) @printf( i8* %s.0 ) ; <i32> [#uses=0]
41 %tmp14 = tail call i32 (i8*, ...) @printf( i8* %s.0 ) ; <i32> [#uses=0]
42 %tmp16 = tail call i32 (i8*, ...) @printf( i8* %s.0 ) ; <i32> [#uses=0]
43 %tmp18 = tail call i32 (i8*, ...) @printf( i8* %s.0 ) ; <i32> [#uses=0]
44 %tmp20 = tail call i32 (i8*, ...) @printf( i8* %s.0 ) ; <i32> [#uses=0]
45 %tmp22 = tail call i32 (i8*, ...) @printf( i8* %s.0 ) ; <i32> [#uses=0]
46 %tmp24 = tail call i32 (i8*, ...) @printf( i8* %s.0 ) ; <i32> [#uses=0]
47 %tmp26 = tail call i32 (i8*, ...) @printf( i8* %s.0 ) ; <i32> [#uses=0
[all...] |
| /external/llvm/test/Transforms/InstCombine/ |
| select-cmp-cttz-ctlz.ll | 9 ; CHECK: [[VAR:%[a-zA-Z0-9]+]] = tail call i16 @llvm.ctlz.i16(i16 %x, i1 false)
12 %0 = tail call i16 @llvm.ctlz.i16(i16 %x, i1 true)
20 ; CHECK: [[VAR:%[a-zA-Z0-9]+]] = tail call i32 @llvm.ctlz.i32(i32 %x, i1 false)
23 %0 = tail call i32 @llvm.ctlz.i32(i32 %x, i1 true)
31 ; CHECK: [[VAR:%[a-zA-Z0-9]+]] = tail call i64 @llvm.ctlz.i64(i64 %x, i1 false)
34 %0 = tail call i64 @llvm.ctlz.i64(i64 %x, i1 true)
42 ; CHECK: [[VAR:%[a-zA-Z0-9]+]] = tail call i16 @llvm.ctlz.i16(i16 %x, i1 false)
45 %0 = tail call i16 @llvm.ctlz.i16(i16 %x, i1 true)
53 ; CHECK: [[VAR:%[a-zA-Z0-9]+]] = tail call i32 @llvm.ctlz.i32(i32 %x, i1 false)
56 %0 = tail call i32 @llvm.ctlz.i32(i32 %x, i1 true
[all...] |
| /external/llvm/lib/CodeGen/ |
| EarlyIfConversion.cpp | 75 // Tail Tail
78 // Head block, and phis in the Tail block are converted to select instructions.
91 MachineBasicBlock *Tail;
100 /// equal to Tail.
101 bool isTriangle() const { return TBB == Tail || FBB == Tail; }
103 /// Returns the Tail predecessor for the True side.
104 MachineBasicBlock *getTPred() const { return TBB == Tail ? Head : TBB; }
106 /// Returns the Tail predecessor for the False side
[all...] |
| /external/clang/test/CodeGenObjCXX/ |
| nrvo.mm | 17 // CHECK: tail call void @_ZN1XC1Ev
27 // CHECK: tail call void @_ZN1XC1Ev
|
| /external/iproute2/tc/ |
| q_dsmark.c | 32 struct rtattr *tail; local
71 tail = NLMSG_TAIL(n);
80 tail->rta_len = (void *) NLMSG_TAIL(n) - (void *) tail;
94 struct rtattr *tail; local
98 tail = NLMSG_TAIL(n);
126 tail->rta_len = (void *) NLMSG_TAIL(n) - (void *) tail;
|
| /external/llvm/test/CodeGen/PowerPC/ |
| 2007-04-24-InlineAsm-I-Modifier.ll | 7 %tmp1 = tail call i32 asm "foo${1:I} $0, $1", "=r,rI"( i32 %X )
12 %tmp1 = tail call i32 asm "bar${1:I} $0, $1", "=r,rI"( i32 47 )
|
| 2008-12-02-LegalizeTypeAssert.ll | 9 %0 = tail call ppc_fp128 @copysignl(ppc_fp128 0xM00000000000000000000000000000000, ppc_fp128 %a) nounwind readnone ; <ppc_fp128> [#uses=0]
11 %1 = tail call ppc_fp128 @copysignl(ppc_fp128 %iftmp.1.0, ppc_fp128 %b) nounwind readnone ; <ppc_fp128> [#uses=0]
|
| 2010-05-03-retaddr1.ll | 10 %0 = tail call i8* @llvm.frameaddress(i32 1) ; <i8*> [#uses=1]
23 %0 = tail call i8* @llvm.returnaddress(i32 1) ; <i8*> [#uses=1]
|
