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  /external/clang/test/CodeGen/
fp-contract-pragma.cpp 6 // CHECK: tail call float @llvm.fmuladd
34 // CHECK: tail call float @llvm.fmuladd
47 // CHECK: tail call float @llvm.fmuladd
53 // CHECK: tail call float @llvm.fmuladd
  /external/fio/crc/
murmur3.c 26 const uint8_t *tail = (const uint8_t *)(data + nblocks * 4); local
31 k1 ^= tail[2] << 16;
33 k1 ^= tail[1] << 8;
35 k1 ^= tail[0];
  /external/llvm/test/CodeGen/AArch64/
arm64-leaf.ll 11 tail call void asm sideeffect "nop", "~{v8}"() nounwind
arm64-sincos.ll 17 %call = tail call float @sinf(float %x) nounwind readnone
18 %call1 = tail call float @cosf(float %x) nounwind readnone
33 %call = tail call double @sin(double %x) nounwind readnone
34 %call1 = tail call double @cos(double %x) nounwind readnone
arm64-vcvtxd_f32_f64.ll 7 %vcvtxd.i = tail call float @llvm.aarch64.sisd.fcvtxn(double %a) nounwind
arm64-zero-cycle-zeroing.ll 13 tail call void @bar(double 0.000000e+00, double 0.000000e+00, double 0.000000e+00, double 0.000000e+00) nounwind
23 tail call void @bari(i32 0, i32 0) nounwind
33 tail call void @barl(i64 0, i64 0) nounwind
42 tail call void @barf(float 0.000000e+00, float 0.000000e+00) nounwind
  /external/llvm/test/CodeGen/ARM/
bswap-inline-asm.ll 7 %asmtmp = tail call i32 asm "rev $0, $1\0A", "=l,l"(i32 %x) nounwind
fpow.ll 5 %0 = tail call double @llvm.pow.f64( double %x, double %y ) ; <double> [#uses=1]
  /external/llvm/test/CodeGen/Hexagon/
simpletailcall.ll 10 %call = tail call i32 bitcast (i32 (...)* @bar_empty to i32 (i32)*)(i32 %add) nounwind
  /external/llvm/test/CodeGen/Mips/
octeon_popcnt.ll 5 %cnt = tail call i8 @llvm.ctpop.i8(i8 %x)
15 %cnt = tail call i16 @llvm.ctpop.i16(i16 %x)
25 %cnt = tail call i32 @llvm.ctpop.i32(i32 %x)
35 %cnt = tail call i64 @llvm.ctpop.i64(i64 %x)
  /external/llvm/test/CodeGen/NVPTX/
ldu-ldg.ll 13 %val = tail call i8 @llvm.nvvm.ldu.global.i.i8.p1i8(i8 addrspace(1)* %ptr, i32 4)
20 %val = tail call i32 @llvm.nvvm.ldu.global.i.i32.p1i32(i32 addrspace(1)* %ptr, i32 4)
27 %val = tail call i8 @llvm.nvvm.ldg.global.i.i8.p1i8(i8 addrspace(1)* %ptr, i32 4)
34 %val = tail call i32 @llvm.nvvm.ldg.global.i.i32.p1i32(i32 addrspace(1)* %ptr, i32 4)
refl1.ll 9 %tan = tail call fastcc float @__nv_fast_tanf(float %val)
27 %0 = tail call float @llvm.nvvm.sin.approx.ftz.f(float %a)
28 %1 = tail call float @llvm.nvvm.cos.approx.ftz.f(float %a)
29 %2 = tail call float @llvm.nvvm.div.approx.ftz.f(float %0, float %1)
vector-call.ll 10 tail call void @bar(<4 x i32> %a)
  /external/llvm/test/CodeGen/PowerPC/
cmp-cmp.ll 8 tail call void @test( i64 0 )
hello.ll 8 %tmp2 = tail call i32 @puts( i8* getelementptr ([13 x i8], [13 x i8]* @.str, i32 0, i64 0) )
in-asm-f64-reg.ll 7 %0 = tail call double* asm sideeffect "qvstfdux $2,$0,$1", "=b,{r7},{f11},0,~{memory}"(i32 64, double undef, double* undef)
ppcf128-2.ll 8 %tmp6 = tail call i64 @__fixunstfdi( ppc_fp128 %tmp5 ) nounwind ; <i64> [#uses=0]
tailcall1-64.ll 9 %tmp11 = tail call fastcc i32 @tailcallee( i32 %in1, i32 %in2, i32 %in1, i32 %in2 ) ; <i32> [#uses=1]
tailcall1.ll 9 %tmp11 = tail call fastcc i32 @tailcallee( i32 %in1, i32 %in2, i32 %in1, i32 %in2 ) ; <i32> [#uses=1]
vec_clz.ll 11 %vcnt = tail call <16 x i8> @llvm.ctlz.v16i8(<16 x i8> %x)
19 %vcnt = tail call <8 x i16> @llvm.ctlz.v8i16(<8 x i16> %x)
27 %vcnt = tail call <4 x i32> @llvm.ctlz.v4i32(<4 x i32> %x)
35 %vcnt = tail call <2 x i64> @llvm.ctlz.v2i64(<2 x i64> %x)
  /external/llvm/test/CodeGen/Thumb/
fpow.ll 5 %0 = tail call double @llvm.pow.f64( double %x, double %y ) ; <double> [#uses=1]
  /external/llvm/test/CodeGen/Thumb2/
thumb2-clz.ll 6 %tmp = tail call i32 @llvm.ctlz.i32(i32 %a, i1 true)
  /external/llvm/test/CodeGen/X86/
2007-03-24-InlineAsmPModifier.ll 6 %tmp1 = tail call i32* asm sideeffect "mov %gs:${1:P}, $0", "=r,i,~{dirflag},~{fpsr},~{flags}"( i32 72 ) ; <%struct._pthread*> [#uses=1]
2007-03-24-InlineAsmXConstraint.ll 11 tail call void asm sideeffect "psrlw $0, %xmm0", "X,~{dirflag},~{fpsr},~{flags}"( i32 8 )
2008-04-24-MemCpyBug.ll 10 tail call void @test63( %struct.S63* byval align 4 @g1s63 ) nounwind

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