| /external/llvm/test/CodeGen/Hexagon/ |
| tail-call-mem-intrinsics.ll | 7 tail call void @llvm.memcpy.p0i8.p0i8.i32(i8* %p, i8* %q, i32 %n, i32 1, i1 false)
15 tail call void @llvm.memmove.p0i8.p0i8.i32(i8* %p, i8* %q, i32 %n, i32 1, i1 false)
23 tail call void @llvm.memset.p0i8.i32(i8* %p, i8 %c, i32 %n, i32 1, i1 false)
|
| /external/llvm/test/CodeGen/Mips/ |
| gprestore.ll | 20 tail call void (...) @f1() nounwind
22 tail call void @f2(i32 %tmp) nounwind
25 tail call void @f3(i32 %tmp1, i32 %tmp2) nounwind
|
| dsp-r1.ll | 7 %1 = tail call i32 @llvm.mips.extr.w(i64 %a0, i32 15)
17 %1 = tail call i32 @llvm.mips.extr.w(i64 %a0, i32 %a1)
25 %1 = tail call i32 @llvm.mips.extr.r.w(i64 %a0, i32 15)
35 %1 = tail call i32 @llvm.mips.extr.s.h(i64 %a0, i32 %a1)
45 %1 = tail call i32 @llvm.mips.extr.rs.w(i64 %a0, i32 15)
55 %1 = tail call i32 @llvm.mips.extr.rs.w(i64 %a0, i32 %a1)
63 %1 = tail call i32 @llvm.mips.extr.s.h(i64 %a0, i32 15)
71 %1 = tail call i32 @llvm.mips.extr.r.w(i64 %a0, i32 %a1)
79 %1 = tail call i32 @llvm.mips.extp(i64 %a0, i32 15)
89 %1 = tail call i32 @llvm.mips.extp(i64 %a0, i32 %a1
[all...] |
| /external/llvm/test/CodeGen/NVPTX/ |
| ctpop.ll | 7 %val = tail call i32 @llvm.ctpop.i32(i32 %a)
13 %val = tail call i16 @llvm.ctpop.i16(i16 %a)
19 %val = tail call i64 @llvm.ctpop.i64(i64 %a)
|
| texsurf-queries.ll | 21 %width = tail call i32 @llvm.nvvm.txq.width(i64 %texHandle)
29 %texHandle = tail call i64 @llvm.nvvm.texsurf.handle.internal.p1i64(i64 addrspace(1)* @tex0)
32 %width = tail call i32 @llvm.nvvm.txq.width(i64 %texHandle)
42 %height = tail call i32 @llvm.nvvm.txq.height(i64 %texHandle)
50 %texHandle = tail call i64 @llvm.nvvm.texsurf.handle.internal.p1i64(i64 addrspace(1)* @tex0)
53 %height = tail call i32 @llvm.nvvm.txq.height(i64 %texHandle)
63 %width = tail call i32 @llvm.nvvm.suq.width(i64 %surfHandle)
71 %surfHandle = tail call i64 @llvm.nvvm.texsurf.handle.internal.p1i64(i64 addrspace(1)* @surf0)
74 %width = tail call i32 @llvm.nvvm.suq.width(i64 %surfHandle)
84 %height = tail call i32 @llvm.nvvm.suq.height(i64 %surfHandle
[all...] |
| /external/llvm/test/CodeGen/R600/ |
| wrong-transalu-pos-fix.ll | 14 %x.i = tail call i32 @llvm.r600.read.global.size.x() #1
15 %y.i18 = tail call i32 @llvm.r600.read.global.size.y() #1
17 %z.i17 = tail call i32 @llvm.r600.read.global.size.z() #1
19 %x.i.i = tail call i32 @llvm.r600.read.tgid.x() #1
20 %x.i12.i = tail call i32 @llvm.r600.read.local.size.x() #1
22 %x.i4.i = tail call i32 @llvm.r600.read.tidig.x() #1
25 %y.i.i = tail call i32 @llvm.r600.read.tgid.y() #1
26 %y.i14.i = tail call i32 @llvm.r600.read.local.size.y() #1
28 %y.i6.i = tail call i32 @llvm.r600.read.tidig.y() #1
32 %z.i.i = tail call i32 @llvm.r600.read.tgid.z() #
[all...] |
| /external/llvm/test/CodeGen/SPARC/ |
| 2011-01-11-Call.ll | 25 %0 = tail call i32 (...) @foo() nounwind
26 tail call void (...) @bar() nounwind
51 %0 = tail call i32 (...) @foo() nounwind
|
| 2011-01-19-DelaySlot.ll | 13 %0 = tail call i32 @bar(i32 %a) nounwind
24 %0 = tail call i32 %f(i32 %a, i32 %b) nounwind
64 tail call void asm sideeffect "sethi 0, %g0", ""() nounwind
69 %1 = tail call i32 (...) @foo(i32 %a) nounwind
73 %2 = tail call i32 @bar(i32 %a) nounwind
87 %0 = tail call i32 @func(i32* undef) nounwind
101 tail call void asm sideeffect "", "r,r,~{l0},~{l1},~{l2},~{l3},~{l4},~{l5},~{l6},~{l7},~{i0},~{i1},~{i2},~{i3},~{i4},~{i5},~{i6},~{i7},~{o0},~{o1},~{o2},~{o3},~{o4},~{o6},~{g1},~{g2},~{g3},~{g4},~{g5},~{g6},~{g7}"(i32 %0, i32 %1)
103 %3 = tail call i32 @bar(i32 %2)
116 %0 = tail call i32 @bar(i32 %a) nounwind
126 %0 = tail call i32 @bar(i32 %a) nounwin
[all...] |
| /external/llvm/test/CodeGen/SystemZ/ |
| tail-call-mem-intrinsics.ll | 7 tail call void @llvm.memcpy.p0i8.p0i8.i32(i8* %p, i8* %q, i32 %n, i32 1, i1 false)
15 tail call void @llvm.memmove.p0i8.p0i8.i32(i8* %p, i8* %q, i32 %n, i32 1, i1 false)
23 tail call void @llvm.memset.p0i8.i32(i8* %p, i8 %c, i32 %n, i32 1, i1 false)
|
| /external/llvm/test/CodeGen/Thumb2/ |
| thumb2-call-tc.ll | 15 tail call void @g( i32 1, i32 2, i32 3, i32 4 )
26 %tmp.upgrd.2 = tail call i32 %tmp( ) ; <i32> [#uses=0]
36 tail call void @f()
|
| /external/llvm/test/CodeGen/X86/ |
| 2007-02-19-LiveIntervalAssert.ll | 10 %tmp5 = tail call i32 (%struct._IO_FILE*, i8*, ...) @fprintf( %struct._IO_FILE* %tmp, i8* %string, i8* %expression, i32 %line, i8* %filename )
12 %tmp7 = tail call i32 @fflush( %struct._IO_FILE* %tmp6 )
13 tail call void @abort( )
|
| 2008-10-11-CallCrash.ll | 9 %0 = tail call i32 (...) @lshift_s_u(i64 %p_46, i64 0) nounwind ; <i32> [#uses=0]
13 %4 = tail call i32 (...) @func_87(i32 undef, i32 %p_48, i32 1) nounwind ; <i32> [#uses=1]
15 %6 = tail call i32 (...) @div_rhs(i32 %5) nounwind ; <i32> [#uses=0]
|
| 2009-04-13-2AddrAssert-2.ll | 9 %asmtmp23 = tail call %0 asm "mulq $3", "={ax},={dx},{ax},*m,~{dirflag},~{fpsr},~{flags},~{cc}"(i32 0, i32* %a) nounwind ; <%0> [#uses=1]
11 %asmtmp26 = tail call %0 asm "addq $0,$0; adcq $2,$1", "={dx},=r,imr,0,1,~{dirflag},~{fpsr},~{flags},~{cc}"(i32 0, i32 %asmresult25, i32 0) nounwind ; <%0> [#uses=1]
13 %asmtmp29 = tail call %0 asm "addq $0,$0; adcq $2,$1", "={ax},={dx},imr,0,1,~{dirflag},~{fpsr},~{flags},~{cc}"(i32 0, i32 0, i32 %asmresult27) nounwind ; <%0> [#uses=0]
|
| lzcnt-tzcnt.ll | 10 %cnt = tail call i16 @llvm.ctlz.i16(i16 %v, i1 true)
21 %cnt = tail call i32 @llvm.ctlz.i32(i32 %v, i1 true)
32 %cnt = tail call i64 @llvm.ctlz.i64(i64 %v, i1 true)
43 %cnt = tail call i16 @llvm.ctlz.i16(i16 %v, i1 true)
54 %cnt = tail call i32 @llvm.ctlz.i32(i32 %v, i1 true)
65 %cnt = tail call i64 @llvm.ctlz.i64(i64 %v, i1 true)
76 %cnt = tail call i16 @llvm.ctlz.i16(i16 %v, i1 true)
87 %cnt = tail call i32 @llvm.ctlz.i32(i32 %v, i1 true)
98 %cnt = tail call i64 @llvm.ctlz.i64(i64 %v, i1 true)
110 %cnt = tail call i16 @llvm.ctlz.i16(i16 %v, i1 true
[all...] |
| rdtsc.ll | 8 %1 = tail call i64 @llvm.readcyclecounter()
23 %1 = tail call i64 @llvm.x86.rdtsc()
35 %1 = tail call i64 @llvm.x86.rdtscp(i8* %A)
|
| tailcall-disable.ll | 1 ; RUN: llc -disable-tail-calls < %s | FileCheck --check-prefix=CALL %s
14 %call = tail call i32 @helper()
29 %call = tail call i32 @test2()
|
| tailcall-mem-intrinsics.ll | 7 tail call void @llvm.memcpy.p0i8.p0i8.i32(i8* %p, i8* %q, i32 %n, i32 1, i1 false)
15 tail call void @llvm.memmove.p0i8.p0i8.i32(i8* %p, i8* %q, i32 %n, i32 1, i1 false)
23 tail call void @llvm.memset.p0i8.i32(i8* %p, i8 %c, i32 %n, i32 1, i1 false)
|
| tailcall-64.ll | 6 %A = tail call i64 @testi()
14 %A = tail call i64 @testi()
22 ; Tail call shouldn't be blocked by no-op inttoptr.
24 %A = tail call i64 @testi()
36 %A = tail call <4 x float> @testv()
47 %A = tail call { i64, i64} @testp()
54 %A = tail call i64 @testi()
65 %A = tail call { i64, i64} @testp()
79 %A = tail call { i64, i64} @testp()
93 %A = tail call { i64, i64} @testp(
[all...] |
| pic-load-remat.ll | 8 %tmp4403 = tail call <8 x i16> @llvm.x86.sse2.psubs.w( <8 x i16> zeroinitializer, <8 x i16> zeroinitializer ) nounwind readnone ; <<8 x i16>> [#uses=2]
9 %tmp4443 = tail call <8 x i16> @llvm.x86.sse2.padds.w( <8 x i16> zeroinitializer, <8 x i16> zeroinitializer ) nounwind readnone ; <<8 x i16>> [#uses=1]
10 %tmp4609 = tail call <8 x i16> @llvm.x86.sse2.psll.w( <8 x i16> zeroinitializer, <8 x i16> bitcast (<4 x i32> < i32 3, i32 5, i32 6, i32 9 > to <8 x i16>) ) ; <<8 x i16>> [#uses=1]
12 %tmp4658 = tail call <8 x i16> @llvm.x86.sse2.psll.w( <8 x i16> %tmp4651, <8 x i16> bitcast (<4 x i32> < i32 4, i32 1, i32 2, i32 3 > to <8 x i16>) ) ; <<8 x i16>> [#uses=1]
13 %tmp4669 = tail call <8 x i16> @llvm.x86.sse2.pavg.w( <8 x i16> < i16 -23170, i16 -23170, i16 -23170, i16 -23170, i16 -23170, i16 -23170, i16 -23170, i16 -23170 >, <8 x i16> %tmp4443 ) nounwind readnone ; <<8 x i16>> [#uses=2]
14 %tmp4679 = tail call <8 x i16> @llvm.x86.sse2.padds.w( <8 x i16> %tmp4669, <8 x i16> %tmp4669 ) nounwind readnone ; <<8 x i16>> [#uses=1]
16 %tmp4700 = tail call <8 x i16> @llvm.x86.sse2.padds.w( <8 x i16> %tmp4689, <8 x i16> zeroinitializer ) nounwind readnone ; <<8 x i16>> [#uses=1]
19 %tmp4779 = tail call <8 x i16> @llvm.x86.sse2.psll.w( <8 x i16> %tmp4772, <8 x i16> bitcast (<4 x i32> < i32 3, i32 5, i32 undef, i32 7 > to <8 x i16>) ) ; <<8 x i16>> [#uses=1]
21 %tmp4821 = tail call <8 x i16> @llvm.x86.sse2.padds.w( <8 x i16> %tmp4810, <8 x i16> zeroinitializer ) nounwind readnone ; <<8 x i16>> [#uses=1]
23 %tmp4900 = tail call <8 x i16> @llvm.x86.sse2.psll.w( <8 x i16> zeroinitializer, <8 x i16> bitcast (<4 x i32> < i3 (…)
[all...] |
| /external/llvm/test/Transforms/InstCombine/ |
| memcpy.ll | 7 tail call void @llvm.memcpy.p0i8.p0i8.i32(i8* %a, i8* %a, i32 100, i32 1, i1 false)
16 tail call void @llvm.memcpy.p0i8.p0i8.i32(i8* %a, i8* %a, i32 100, i32 1, i1 true)
23 tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %d, i8* %s, i64 17179869184, i32 4, i1 false)
|
| /external/clang/test/CXX/temp/temp.decls/temp.variadic/ |
| example-tuple.cpp | 59 template<typename Head, typename... Tail>
60 class tuple<Head, Tail...> : private tuple<Tail...> {
61 typedef tuple<Tail...> inherited;
69 typename add_const_reference<Tail>::type... vtail)
74 : m_head(other.head()), inherited(other.tail()) { }
79 tail() = other.tail();
85 inherited& tail() { return *this; } function in class:tuple
86 const inherited& tail() const { return *this; function in class:tuple
[all...] |
| /external/f2fs-tools/tools/ |
| f2fstat.c | 87 char *head, *tail; local
136 tail = strchr(head, ':');
137 if (!tail)
139 *tail = '\0';
142 *tail = ':';
143 tail = strchr(head, '\n');
144 head = tail + 1;
152 head = tail + 1;
156 *(found->val) = strtoul(head, &tail, 10);
159 tail = strstr(head, "in")
[all...] |
| /external/llvm/test/CodeGen/Mips/llvm-ir/ |
| call.ll | 3 ; FIXME: We should remove the need for -enable-mips-tail-calls
4 ; RUN: llc -march=mips -mcpu=mips32 -enable-mips-tail-calls < %s | FileCheck %s -check-prefix=ALL -check-prefix=O32
5 ; RUN: llc -march=mips -mcpu=mips32r2 -enable-mips-tail-calls < %s | FileCheck %s -check-prefix=ALL -check-prefix=O32
6 ; RUN: llc -march=mips -mcpu=mips32r3 -enable-mips-tail-calls < %s | FileCheck %s -check-prefix=ALL -check-prefix=O32
7 ; RUN: llc -march=mips -mcpu=mips32r5 -enable-mips-tail-calls < %s | FileCheck %s -check-prefix=ALL -check-prefix=O32
8 ; RUN: llc -march=mips -mcpu=mips32r6 -enable-mips-tail-calls < %s | FileCheck %s -check-prefix=ALL -check-prefix=O32
9 ; RUN: llc -march=mips64 -mcpu=mips4 -enable-mips-tail-calls < %s | FileCheck %s -check-prefix=ALL -check-prefix=N64
10 ; RUN: llc -march=mips64 -mcpu=mips64 -enable-mips-tail-calls < %s | FileCheck %s -check-prefix=ALL -check-prefix=N64
11 ; RUN: llc -march=mips64 -mcpu=mips64r2 -enable-mips-tail-calls < %s | FileCheck %s -check-prefix=ALL -check-prefix=N64
12 ; RUN: llc -march=mips64 -mcpu=mips64r3 -enable-mips-tail-calls < %s | FileCheck %s -check-prefix=ALL -check-prefix=N6
[all...] |
| /external/llvm/test/CodeGen/AArch64/ |
| arm64-inline-asm.ll | 9 %0 = tail call i32 asm "mov ${0:w}, 7", "=r"() nounwind
17 %0 = tail call i64 asm "mov $0, 7", "=r"() nounwind
25 %0 = tail call i64 asm "mov ${0:w}, 7", "=r"() nounwind
35 %0 = tail call i64 asm sideeffect "mov x0, $1; svc #0;", "=r,r,r,~{x0}"(i64 %op, i64 undef) nounwind
45 %0 = tail call float asm "fadd ${0:s}, ${0:s}, ${0:s}", "=w,0"(float %x) nounwind
55 %0 = tail call i8 asm "ldtrb ${0:w}, [$1]", "=r,r"(i8* %src) nounwind
76 tail call void asm sideeffect "nop", "~{v8}"() nounwind
83 %0 = tail call i32 asm sideeffect "add ${0:w}, ${1:w}, $2", "=r,r,I"(i32 %i, i32 16773120) nounwind
85 %1 = tail call i32 asm sideeffect "add ${0:w}, ${1:w}, $2", "=r,r,I"(i32 %i, i32 4096) nounwind
93 %0 = tail call i32 asm sideeffect "sub ${0:w}, ${1:w}, $2", "=r,r,J"(i32 %i, i32 -16773120) nounwin
[all...] |
| /external/apache-harmony/security/src/test/impl/java/org/apache/harmony/security/tests/x509/ |
| ORAddressTest.java | 40 String tail = Integer.toHexString(0x000000ff & data[i]); local
41 if (tail.length() == 1) {
42 tail = "0" + tail;
44 System.out.print(prefix + "0x" + tail + delimiter);
|
