/external/llvm/test/Transforms/AlignmentFromAssumptions/ |
simple32.ll | 9 tail call void @llvm.assume(i1 %maskcond) 24 tail call void @llvm.assume(i1 %maskcond) 40 tail call void @llvm.assume(i1 %maskcond) 55 tail call void @llvm.assume(i1 %maskcond) 69 tail call void @llvm.assume(i1 %maskcond) 97 tail call void @llvm.assume(i1 %maskcond) 125 tail call void @llvm.assume(i1 %maskcond) 153 tail call void @llvm.assume(i1 %maskcond) 181 tail call void @llvm.assume(i1 %maskcond) 183 tail call void @llvm.memset.p0i8.i64(i8* %0, i8 0, i64 64, i32 4, i1 false [all...] |
/external/llvm/test/CodeGen/X86/ |
2010-05-25-DotDebugLoc.ll | 13 tail call void @llvm.dbg.value(metadata float %a, i64 0, metadata !0, metadata !MDExpression()), !dbg !MDLocation(scope: !1) 14 tail call void @llvm.dbg.value(metadata float %b, i64 0, metadata !11, metadata !MDExpression()), !dbg !MDLocation(scope: !1) 15 tail call void @llvm.dbg.value(metadata float %c, i64 0, metadata !12, metadata !MDExpression()), !dbg !MDLocation(scope: !1) 16 tail call void @llvm.dbg.value(metadata float %d, i64 0, metadata !13, metadata !MDExpression()), !dbg !MDLocation(scope: !1) 17 %0 = tail call float @fabsf(float %c) nounwind readnone, !dbg !19 ; <float> [#uses=1] 18 %1 = tail call float @fabsf(float %d) nounwind readnone, !dbg !19 ; <float> [#uses=1] 24 tail call void @llvm.dbg.value(metadata float %3, i64 0, metadata !16, metadata !MDExpression()), !dbg !20 27 tail call void @llvm.dbg.value(metadata float %5, i64 0, metadata !14, metadata !MDExpression()), !dbg !21 31 tail call void @llvm.dbg.value(metadata float %8, i64 0, metadata !17, metadata !MDExpression()), !dbg !22 35 tail call void @llvm.dbg.value(metadata float %11, i64 0, metadata !18, metadata !MDExpression()), !dbg (…) [all...] |
stack-folding-fp-sse42.ll | 14 %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"() 22 %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"() 30 %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"() 38 %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"() 47 %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"() 55 %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"() 64 %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"() 73 %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"() 82 %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"() 96 %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~ (…) [all...] |
avx-vextractf128.ll | 27 %0 = tail call <4 x float> @llvm.x86.avx.vextractf128.ps.256(<8 x float> %a, i8 1) 41 %0 = tail call <2 x double> @llvm.x86.avx.vextractf128.pd.256(<4 x double> %a, i8 1) 56 %1 = tail call <4 x i32> @llvm.x86.avx.vextractf128.si.256(<8 x i32> %0, i8 1) 68 %0 = tail call <4 x float> @llvm.x86.avx.vextractf128.ps.256(<8 x float> %a, i8 0) 78 %0 = tail call <2 x double> @llvm.x86.avx.vextractf128.pd.256(<4 x double> %a, i8 0) 89 %1 = tail call <4 x i32> @llvm.x86.avx.vextractf128.si.256(<8 x i32> %0, i8 0) 100 %1 = tail call <4 x i32> @llvm.x86.avx.vextractf128.si.256(<8 x i32> %0, i8 0)
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mmx-bitcast.ll | 11 %u = tail call x86_mmx @llvm.x86.mmx.padd.q(x86_mmx %t, x86_mmx %t) 24 %u = tail call x86_mmx @llvm.x86.mmx.padd.d(x86_mmx %t, x86_mmx %t) 37 %u = tail call x86_mmx @llvm.x86.mmx.padd.w(x86_mmx %t, x86_mmx %t) 50 %u = tail call x86_mmx @llvm.x86.mmx.padd.b(x86_mmx %t, x86_mmx %t) 66 %tmp7 = tail call x86_mmx @llvm.x86.mmx.paddus.w(x86_mmx %tmp2, x86_mmx %tmp3) 68 tail call void @llvm.x86.mmx.emms() 97 %t2 = tail call x86_mmx @llvm.x86.mmx.pslli.q(x86_mmx %t0, i32 48)
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stack-folding-fp-avx1.ll | 14 %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"() 22 %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"() 30 %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"() 38 %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"() 46 %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"() 54 %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"() 63 %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"() 71 %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"() 80 %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"() 89 %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~ (…) [all...] |
2006-05-01-SchedCausingSpills.ll | 17 %tmp74 = tail call <4 x float> @llvm.x86.sse.cmp.ps( <4 x float> %tmp52, <4 x float> %tmp44, i8 1 ) ; <<4 x float>> [#uses=1] 19 %tmp88 = tail call <4 x float> @llvm.x86.sse.cmp.ps( <4 x float> %tmp44, <4 x float> %tmp61, i8 1 ) ; <<4 x float>> [#uses=1] 21 %tmp98 = tail call <8 x i16> @llvm.x86.sse2.packssdw.128( <4 x i32> %tmp75, <4 x i32> %tmp89 ) ; <<4 x i32>> [#uses=1] 32 %tmp133 = tail call <4 x float> @llvm.x86.sse.cmp.ps( <4 x float> %tmp109.upgrd.3, <4 x float> %tmp44, i8 1 ) ; <<4 x float>> [#uses=1] 34 %tmp147 = tail call <4 x float> @llvm.x86.sse.cmp.ps( <4 x float> %tmp44, <4 x float> %tmp120, i8 1 ) ; <<4 x float>> [#uses=1] 36 %tmp159 = tail call <8 x i16> @llvm.x86.sse2.packssdw.128( <4 x i32> %tmp134, <4 x i32> %tmp148 ) ; <<4 x i32>> [#uses=1] 47 %tmp194 = tail call <4 x float> @llvm.x86.sse.cmp.ps( <4 x float> %tmp170.upgrd.5, <4 x float> %tmp44, i8 1 ) ; <<4 x float>> [#uses=1] 49 %tmp208 = tail call <4 x float> @llvm.x86.sse.cmp.ps( <4 x float> %tmp44, <4 x float> %tmp181, i8 1 ) ; <<4 x float>> [#uses=1] 51 %tmp220 = tail call <8 x i16> @llvm.x86.sse2.packssdw.128( <4 x i32> %tmp195, <4 x i32> %tmp209 ) ; <<4 x i32>> [#uses=1] 62 %tmp255 = tail call <4 x float> @llvm.x86.sse.cmp.ps( <4 x float> %tmp231.upgrd.7, <4 x float> %tmp44, i8 1 ) ; (…) [all...] |
2008-08-31-EH_RETURN64.ll | 40 %call = tail call i32 (...) @_Unwind_ForcedUnwind_Phase2() nounwind 46 tail call void @abort() noreturn nounwind 50 tail call void @llvm.eh.return.i64(i64 0, i8* null)
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2008-09-11-CoalescerBug.ll | 12 %4 = tail call i32 (...) @rshift_u_s( i32 1 ) nounwind ; <i32> [#uses=1] 20 %12 = tail call i32 (...) @func_20( i32 1 ) nounwind ; <i32> [#uses=1] 30 %20 = tail call i32 (...) @func_7( i32 %.0 ) nounwind ; <i32> [#uses=0]
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/external/llvm/lib/Transforms/Scalar/ |
TailRecursionElimination.cpp | 1 //===- TailRecursionElimination.cpp - Eliminate Tail Calls ----------------===// 18 // 2. This pass transforms functions that are prevented from being tail 29 // they are marked as eligible for tail call elimination (by the code 36 // evaluated each time through the tail recursion. Safely keeping allocas 37 // in the entry block requires analysis to proves that the tail-called 39 // 2. Tail recursion is only performed if the call immediately precedes the 83 STATISTIC(NumEliminated, "Number of tail calls removed"); 127 "Tail Call Elimination", false, false) 130 "Tail Call Elimination", false, false) 284 // the same block twice. Because of this, we defer setting tail on calls whe [all...] |
/external/apache-xml/src/main/java/org/apache/xml/dtm/ref/sax2dtm/ |
SAX2RTFDTM.java | 45 * 2) A stack of these documents is maintained, allowing us to "tail-prune" the 70 /** Tail-pruning mark: Number of nodes in use */ 72 /** Tail-pruning mark: Number of data items in use */ 74 /** Tail-pruning mark: Number of size-of-data fields in use */ 76 /** Tail-pruning mark: Number of dataOrQName slots in use */ 78 /** Tail-pruning mark: Number of namespace declaration sets in use 84 /** Tail-pruning mark: Number of naespace declaration elements in use 92 * Tail-pruning mark: initial number of nodes in use 97 * Tail-pruning mark: initial number of namespace declaration sets 102 * Tail-pruning mark: initial number of namespace declaration element [all...] |
/external/llvm/test/CodeGen/AArch64/ |
arm64-neon-vector-list-spill.ll | 13 %vld = tail call { <2 x i32>, <2 x i32> } @llvm.aarch64.neon.ld2.v2i32.p0i32(i32* %arg1) 18 tail call void @foo() 33 %vld = tail call { <4 x i16>, <4 x i16>, <4 x i16> } @llvm.aarch64.neon.ld3.v4i16.p0i16(i16* %arg1) 38 tail call void @foo() 53 %vld = tail call { <4 x i16>, <4 x i16>, <4 x i16>, <4 x i16> } @llvm.aarch64.neon.ld4.v4i16.p0i16(i16* %arg1) 58 tail call void @foo() 73 %vld = tail call { <4 x i32>, <4 x i32> } @llvm.aarch64.neon.ld2.v4i32.p0i32(i32* %arg1) 78 tail call void @foo() 93 %vld3 = tail call { <4 x float>, <4 x float>, <4 x float> } @llvm.aarch64.neon.ld3.v4f32.p0f32(float* %arg1) 98 tail call void @foo( [all...] |
arm64-patchpoint.ll | 19 %result = tail call i64 (i64, i32, i8*, i32, ...) @llvm.experimental.patchpoint.i64(i64 2, i32 20, i8* %resolveCall2, i32 4, i64 %p1, i64 %p2, i64 %p3, i64 %p4) 21 tail call void (i64, i32, i8*, i32, ...) @llvm.experimental.patchpoint.void(i64 3, i32 20, i8* %resolveCall3, i32 2, i64 %p1, i64 %result) 54 tail call void (i64, i32, ...) @llvm.experimental.stackmap(i64 14, i32 8, i64 %arg, i64 %tmp2, i64 %tmp10, i64 %tmp82) 55 tail call void (i64, i32, i8*, i32, ...) @llvm.experimental.patchpoint.void(i64 15, i32 32, i8* null, i32 3, i64 %arg, i64 %tmp10, i64 %tmp82) 60 tail call void (i64, i32, ...) @llvm.experimental.stackmap(i64 17, i32 8, i64 %arg, i64 %tmp10, i64 %tmp86) 61 tail call void (i64, i32, i8*, i32, ...) @llvm.experimental.patchpoint.void(i64 18, i32 32, i8* null, i32 3, i64 %arg, i64 %tmp10, i64 %tmp86) 77 %result = tail call i64 (i64, i32, i8*, i32, ...) @llvm.experimental.patchpoint.i64(i64 5, i32 20, i8* null, i32 2, i64 %p1, i64 %p2)
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arm64-bcc.ll | 7 %2 = tail call { i32, i1 } @llvm.sadd.with.overflow.i32(i32 %0, i32 %1) 16 tail call void @llvm.trap() 52 tail call void @llvm.trap()
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/external/llvm/test/CodeGen/PowerPC/ |
ppc64-patchpoint.ll | 31 %result = tail call i64 (i64, i32, i8*, i32, ...) @llvm.experimental.patchpoint.i64(i64 2, i32 24, i8* %resolveCall2, i32 4, i64 %p1, i64 %p2, i64 %p3, i64 %p4) 33 tail call void (i64, i32, i8*, i32, ...) @llvm.experimental.patchpoint.void(i64 3, i32 24, i8* %resolveCall3, i32 2, i64 %p1, i64 %result) 67 tail call void (i64, i32, ...) @llvm.experimental.stackmap(i64 14, i32 8, i64 %arg, i64 %tmp2, i64 %tmp10, i64 %tmp82) 68 tail call void (i64, i32, i8*, i32, ...) @llvm.experimental.patchpoint.void(i64 15, i32 32, i8* null, i32 3, i64 %arg, i64 %tmp10, i64 %tmp82) 73 tail call void (i64, i32, ...) @llvm.experimental.stackmap(i64 17, i32 8, i64 %arg, i64 %tmp10, i64 %tmp86) 74 tail call void (i64, i32, i8*, i32, ...) @llvm.experimental.patchpoint.void(i64 18, i32 32, i8* null, i32 3, i64 %arg, i64 %tmp10, i64 %tmp86) 90 %result = tail call i64 (i64, i32, i8*, i32, ...) @llvm.experimental.patchpoint.i64(i64 5, i32 20, i8* null, i32 2, i64 %p1, i64 %p2)
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/external/llvm/test/Instrumentation/MemorySanitizer/ |
vector_shift.ll | 21 %3 = tail call x86_mmx @llvm.x86.mmx.psll.d(x86_mmx %1, x86_mmx %2) 40 %0 = tail call <8 x i16> @llvm.x86.sse2.pslli.w(<8 x i16> %x, i32 %y) 56 %0 = tail call <8 x i16> @llvm.x86.sse2.psrl.w(<8 x i16> %x, <8 x i16> %y) 76 %0 = tail call <4 x i32> @llvm.x86.avx2.psllv.d(<4 x i32> %x, <4 x i32> %y) 85 ; CHECK: = tail call <4 x i32> @llvm.x86.avx2.psllv.d( 90 %0 = tail call <8 x i32> @llvm.x86.avx2.psllv.d.256(<8 x i32> %x, <8 x i32> %y) 99 ; CHECK: = tail call <8 x i32> @llvm.x86.avx2.psllv.d.256(
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/external/llvm/test/Transforms/SimplifyCFG/X86/ |
speculate-cttz-ctlz.ll | 9 ; ALL: [[CTLZ:%[A-Za-z0-9]+]] = tail call i64 @llvm.ctlz.i64(i64 %A, i1 true) 19 %0 = tail call i64 @llvm.ctlz.i64(i64 %A, i1 true) 30 ; ALL: [[CTLZ:%[A-Za-z0-9]+]] = tail call i32 @llvm.ctlz.i32(i32 %A, i1 true) 40 %0 = tail call i32 @llvm.ctlz.i32(i32 %A, i1 true) 52 ; ALL: [[CTLZ:%[A-Za-z0-9]+]] = tail call i16 @llvm.ctlz.i16(i16 %A, i1 true) 62 %0 = tail call i16 @llvm.ctlz.i16(i16 %A, i1 true) 74 ; ALL: [[CTTZ:%[A-Za-z0-9]+]] = tail call i64 @llvm.cttz.i64(i64 %A, i1 true) 84 %0 = tail call i64 @llvm.cttz.i64(i64 %A, i1 true) 96 ; ALL: [[CTTZ:%[A-Za-z0-9]+]] = tail call i32 @llvm.cttz.i32(i32 %A, i1 true) 106 %0 = tail call i32 @llvm.cttz.i32(i32 %A, i1 true [all...] |
/external/mesa3d/src/gallium/drivers/nouveau/ |
nouveau_fence.c | 95 if (screen->fence.tail) 96 screen->fence.tail->next = fence; 100 screen->fence.tail = fence; 119 screen->fence.tail = NULL; 123 if (screen->fence.tail == fence) 124 screen->fence.tail = it; 161 screen->fence.tail = NULL;
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/external/llvm/include/llvm/ADT/ |
ImmutableList.h | 29 const ImmutableListImpl* Tail; 31 ImmutableListImpl(const T& head, const ImmutableListImpl* tail = 0) 32 : Head(head), Tail(tail) {} 41 const ImmutableListImpl* getTail() const { return Tail; } 50 Profile(ID, Head, Tail); 128 /// getTail - Returns the tail of the list, which is another (possibly empty) 166 ImmutableList<T> concat(const T& Head, ImmutableList<T> Tail) { 171 const ListTy* TailImpl = Tail.getInternalPointer();
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/external/llvm/test/Transforms/LoopRotate/ |
dbgvalue.ll | 18 tail call void @llvm.dbg.value(metadata i32 %x.tr, i64 0, metadata !6, metadata !MDExpression()), !dbg !7 19 tail call void @llvm.dbg.value(metadata i32 %y.tr, i64 0, metadata !8, metadata !MDExpression()), !dbg !9 20 tail call void @llvm.dbg.value(metadata i32 %z.tr, i64 0, metadata !10, metadata !MDExpression()), !dbg !11 26 %call = tail call i32 @tak(i32 %sub, i32 %y.tr, i32 %z.tr), !dbg !14 28 %call9 = tail call i32 @tak(i32 %sub6, i32 %z.tr, i32 %x.tr), !dbg !14 30 %call14 = tail call i32 @tak(i32 %sub11, i32 %x.tr, i32 %y.tr), !dbg !14 44 ; Ensure that the loop increment basic block is rotated into the tail of the 48 ; CHECK-NEXT: tail call void @llvm.dbg.value 75 tail call void @llvm.dbg.value(metadata i64 %dec, i64 0, metadata !MDLocalVariable(tag: DW_TAG_auto_variable, scope: !0), metadata !MDExpression()), !dbg !MDLocation(scope: !0)
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/external/clang/test/CXX/temp/temp.fct.spec/temp.deduct/temp.deduct.type/ |
p9-0x.cpp | 34 typename Tail> // expected-note{{non-deducible template parameter 'Tail'}} 35 struct UselessPartialSpec<Types..., Tail>; // expected-warning{{class template partial specialization contains template parameters that cannot be deduced; this partial specialization will never be used}}
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/external/llvm/test/CodeGen/ARM/ |
2014-05-14-DwarfEHCrash.ll | 20 %2 = tail call i32 @llvm.eh.typeid.for(i8* bitcast (i8** @_ZTIi to i8*)) #2 26 %4 = tail call i8* @__cxa_begin_catch(i8* %3) #2 27 tail call void @__cxa_end_catch() #2
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/external/llvm/test/CodeGen/Mips/ |
fpbr.ll | 27 tail call void (...) @g0() nounwind 31 tail call void (...) @g1() nounwind 60 tail call void (...) @g0() nounwind 64 tail call void (...) @g1() nounwind 89 tail call void (...) @g0() nounwind 93 tail call void (...) @g1() nounwind 119 tail call void (...) @g0() nounwind 123 tail call void (...) @g1() nounwind 148 tail call void (...) @g0() nounwind 152 tail call void (...) @g1() nounwin [all...] |
/external/llvm/test/CodeGen/NVPTX/ |
rotate.ll | 17 %val = tail call i32 @llvm.nvvm.rotate.b32(i32 %a, i32 %b) 30 %val = tail call i64 @llvm.nvvm.rotate.b64(i64 %a, i32 %b) 43 %val = tail call i64 @llvm.nvvm.rotate.right.b64(i64 %a, i32 %b)
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surf-write-cuda.ll | 17 tail call void @llvm.nvvm.sust.b.1d.i32.trap(i64 %img, i32 %idx, i32 %val) 30 %surfHandle = tail call i64 @llvm.nvvm.texsurf.handle.internal.p1i64(i64 addrspace(1)* @surf0) 33 tail call void @llvm.nvvm.sust.b.1d.i32.trap(i64 %surfHandle, i32 %idx, i32 %val)
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