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/external/libvpx/libvpx/vp9/common/x86/
vp9_idct_intrin_sse2.c	396 tmp6 = _mm_madd_epi16(lo_1, cst3); \ 405 tmp6 = _mm_add_epi32(tmp6, rounding); \ 414 tmp6 = _mm_srai_epi32(tmp6, DCT_CONST_BITS); \ 420 res3 = _mm_packs_epi32(tmp6, tmp7); \ 532 __m128i tmp0, tmp1, tmp2, tmp3, tmp4, tmp5, tmp6, tmp7; local 620 __m128i tmp0, tmp1, tmp2, tmp3, tmp4, tmp5, tmp6, tmp7; local 944 __m128i tmp0, tmp1, tmp2, tmp3, tmp4, tmp5, tmp6, tmp7; local 1341 __m128i tmp0, tmp1, tmp2, tmp3, tmp4, tmp5, tmp6, tmp7; local 2394 __m128i tmp0, tmp1, tmp2, tmp3, tmp4, tmp5, tmp6, tmp7; local 3351 __m128i tmp0, tmp1, tmp2, tmp3, tmp4, tmp5, tmp6, tmp7; local 3636 __m128i tmp0, tmp1, tmp2, tmp3, tmp4, tmp5, tmp6, tmp7; local     [all...]
/hardware/intel/common/omx-components/videocodec/libvpx_internal/libvpx/vp9/common/x86/
vp9_idct_intrin_sse2.c	410 tmp6 = _mm_madd_epi16(lo_1, cst3); \ 419 tmp6 = _mm_add_epi32(tmp6, rounding); \ 428 tmp6 = _mm_srai_epi32(tmp6, DCT_CONST_BITS); \ 434 res3 = _mm_packs_epi32(tmp6, tmp7); \ 556 __m128i tmp0, tmp1, tmp2, tmp3, tmp4, tmp5, tmp6, tmp7; local 691 __m128i tmp0, tmp1, tmp2, tmp3, tmp4, tmp5, tmp6, tmp7; local 1015 __m128i tmp0, tmp1, tmp2, tmp3, tmp4, tmp5, tmp6, tmp7; local 1412 __m128i tmp0, tmp1, tmp2, tmp3, tmp4, tmp5, tmp6, tmp7; local 2558 __m128i tmp0, tmp1, tmp2, tmp3, tmp4, tmp5, tmp6, tmp7; local 3515 __m128i tmp0, tmp1, tmp2, tmp3, tmp4, tmp5, tmp6, tmp7; local 3800 __m128i tmp0, tmp1, tmp2, tmp3, tmp4, tmp5, tmp6, tmp7; local     [all...]
/external/llvm/test/CodeGen/AArch64/
arm64-ldxr-stxr.ll	24 %tmp6 = lshr i128 %val, 64 25 %tmp7 = trunc i128 %tmp6 to i64 163 %tmp6 = lshr i128 %val, 64 164 %tmp7 = trunc i128 %tmp6 to i64
arm64-dup.ll	11 %tmp6 = insertelement <8 x i8> %tmp5, i8 %A, i32 5 12 %tmp7 = insertelement <8 x i8> %tmp6, i8 %A, i32 6 51 %tmp6 = insertelement <16 x i8> %tmp5, i8 %A, i32 5 52 %tmp7 = insertelement <16 x i8> %tmp6, i8 %A, i32 6 73 %tmp6 = insertelement <8 x i16> %tmp5, i16 %A, i32 5 74 %tmp7 = insertelement <8 x i16> %tmp6, i16 %A, i32 6
/external/llvm/test/CodeGen/ARM/
2007-05-07-tailmerge-1.ll	33 %tmp6 = call i32 (...) @baz( i32 5, i32 6 ) ; <i32> [#uses=0]
2007-05-09-tailmerge-2.ll	39 %tmp6 = call i32 (...) @baz( i32 5, i32 6 ) ; <i32> [#uses=0]
ldstrex.ll	27 %tmp6 = lshr i64 %val, 32 28 %tmp7 = trunc i64 %tmp6 to i32
spill-q.ll	75 %tmp6 = fadd <4 x float> %tmp5, %ld8 76 %tmp7 = fadd <4 x float> %tmp6, %ld9
vfp.ll	121 %tmp6 = or i1 %tmp.upgrd.1, %tmp5 ; <i1> [#uses=1] 124 br i1 %tmp6, label %cond_true, label %cond_false
2010-06-21-nondarwin-tc.ll	65 %tmp6.i.i = load %"class.llvm::RecordVal"*, %"class.llvm::RecordVal"** %tmp5.i.i ; <%"class.llvm::RecordVal"*> [#uses=5] 67 %sub.ptr.rhs.cast.i.i = ptrtoint %"class.llvm::RecordVal"* %tmp6.i.i to i32 ; <i32> [#uses=1] 73 %targetBlock = call i1 @_ZNK4llvm7VarInit12getFieldInitERNS_6RecordEPKNS_9RecordValERKSs_for.cond.i(i32 %sub.ptr.div.i.i, %"class.llvm::RecordVal"* %tmp6.i.i, i32 %tmp2.i.i.i, i8* %tmp3.i.i.i.i, i32* %.loc) ; <i1> [#uses=1] 81 %add.ptr.i.i = getelementptr inbounds %"class.llvm::RecordVal", %"class.llvm::RecordVal"* %tmp6.i.i, i32 %.reload ; <%"class.llvm::RecordVal"*> [#uses=2] 103 %tmp.i3 = getelementptr inbounds %"class.llvm::RecordVal", %"class.llvm::RecordVal"* %tmp6.i.i, i32 %.reload, i32 3 ; <%"struct.llvm::Init"**> [#uses=1] 124 %tmp.i1 = getelementptr inbounds %"class.llvm::RecordVal", %"class.llvm::RecordVal"* %tmp6.i.i, i32 %.reload, i32 3 ; <%"struct.llvm::Init"**> [#uses=1]
vdup.ll	12 %tmp6 = insertelement <8 x i8> %tmp5, i8 %A, i32 5 13 %tmp7 = insertelement <8 x i8> %tmp6, i8 %A, i32 6 52 %tmp6 = insertelement <16 x i8> %tmp5, i8 %A, i32 5 53 %tmp7 = insertelement <16 x i8> %tmp6, i8 %A, i32 6 74 %tmp6 = insertelement <8 x i16> %tmp5, i16 %A, i32 5 75 %tmp7 = insertelement <8 x i16> %tmp6, i16 %A, i32 6
/external/llvm/test/CodeGen/PowerPC/
2007-05-22-tailmerge-3.ll	35 %tmp6 = call i32 (...) @baz( i32 5, i32 6 ) ; <i32> [#uses=0]
/external/llvm/test/CodeGen/WinEH/
cppeh-frame-vars.ll	112 %tmp6 = extractvalue { i8*, i32 } %tmp4, 1 113 store i32 %tmp6, i32* %ehselector.slot 227 ; CHECK: [[TMP6:\%.+]] = load i32, i32* [[B_PTR]], align 4 228 ; CHECK: %add2 = add nsw i32 [[TMP6]], [[TMP5]]
/external/llvm/test/Transforms/Inline/
inline_minisize.ll	29 %tmp6 = load i32, i32* %i, align 4 31 %cmp = icmp slt i32 %tmp6, %tmp7 129 %tmp6 = load i32, i32* %i, align 4 131 %cmp = icmp slt i32 %tmp6, %tmp7
/external/llvm/test/Transforms/InstCombine/
xor.ll	261 ; CHECK-NEXT: %tmp6 = zext i1 %tmp to i32 262 ; CHECK-NEXT: ret i32 %tmp6 266 %tmp6 = zext i1 %tmp to i32 ; <i32> [#uses=1] 267 ret i32 %tmp6
simplify-libcalls.ll	53 %tmp6 = icmp eq i32 %tmp5, 0 ; <i1> [#uses=1] 54 ret i1 %tmp6
/external/llvm/test/CodeGen/Thumb2/
thumb2-spill-q.ll	75 %tmp6 = fadd <4 x float> %tmp5, %ld8 76 %tmp7 = fadd <4 x float> %tmp6, %ld9
/external/llvm/test/CodeGen/X86/
pr1505b.ll	36 %tmp6 = load volatile float, float* @a ; <float> [#uses=1] 39 %tmp9 = tail call float @tanf( float %tmp6 ) ; <float> [#uses=1]
scalar_widen_div.ll	27 %tmp6 = load <2 x i32> addrspace(1)*, <2 x i32> addrspace(1)** %dsource.addr 29 %arrayidx8 = getelementptr <2 x i32>, <2 x i32> addrspace(1)* %tmp6, i32 %tmp7
vselect-avx.ll	73 %tmp6 = srem <4 x i32> %induction30, <i32 3, i32 3, i32 3, i32 3> 74 %tmp7 = icmp eq <4 x i32> %tmp6, zeroinitializer
widen_shuffle-1.ll	56 %tmp6.i14 = shufflevector <3 x float> %tmp3.i13, <3 x float> zeroinitializer, <4 x i32> <i32 0, i32 1, i32 2, i32 3> 57 %tmp97.i = shufflevector <4 x float> %tmp6.i14, <4 x float> undef, <3 x i32> <i32 0, i32 1, i32 2>
crash.ll	249 %tmp6 = phi i96 [ undef, %bb ], [ %tmp39, %bb37 ] 254 %tmp9 = and i96 %tmp6, 4294967040 308 %tmp39 = phi i96 [ %tmp24, %bb31 ], [ %tmp6, %bb35 ], [ %tmp6, %bb36 ] 514 %tmp6 = bitcast <4 x float> %tmp to i128 523 %tmp11 = phi i128 [ undef, %bb1 ], [ %tmp6, %bb5 ]
/external/llvm/test/MC/ARM/
ldr-pseudo.s	80 @ CHECK: ldr r0, .Ltmp[[TMP6:[0-9]+]] 181 @ CHECK: .Ltmp[[TMP6]]
/external/llvm/test/Transforms/LoopRotate/
PhiRename-1.ll	48 %tmp6 = load %struct.operator*, %struct.operator** %op ; <%struct.operator*> [#uses=1] 49 %tmp7 = getelementptr %struct.operator, %struct.operator* %tmp6, i32 0, i32 5 ; <i32*> [#uses=1]
/external/llvm/lib/CodeGen/
IntrinsicLowering.cpp	208 Value *Tmp6 = Builder.CreateShl(V, ConstantInt::get(V->getType(), 24), 227 Tmp6 = Builder.CreateAnd(Tmp6, 248 Tmp6 = Builder.CreateOr(Tmp6, Tmp5, "bswap.or2"); 251 Tmp8 = Builder.CreateOr(Tmp8, Tmp6, "bswap.or5");

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