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  /external/valgrind/VEX/priv/
host_generic_simd256.c 41 h_generic_calc_Perm32x8 ( /*OUT*/V256* res,
42 V256* argL, V256* argR )
host_generic_simd256.h 49 void h_generic_calc_Perm32x8 ( /*OUT*/V256*, V256*, V256* );
ir_defs.c 65 case Ity_V256: vex_printf( "V256"); break;
90 case Ico_V256: vex_printf( "V256{0x%08x}", con->Ico.V256); break;
    [all...]
  /external/llvm/test/CodeGen/R600/
codegen-prepare-addrmode-sext.ll 4 target datalayout = "e-p:32:32-p1:64:64-p2:64:64-p3:32:32-p4:32:32-p5:64:64-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-v2048:2048-n32:64"
loop-address.ll 8 target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-v16:16:16-v24:32:32-v32:32:32-v48:64:64-v64:64:64-v96:128:128-v128:128:128-v192:256:256-v256:256:256-v512:512:512-v1024:1024:1024-v2048:2048:2048-n32:64"
unroll.ll 3 target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-v16:16:16-v24:32:32-v32:32:32-v48:64:64-v64:64:64-v96:128:128-v128:128:128-v192:256:256-v256:256:256-v512:512:512-v1024:1024:1024-v2048:2048:2048-n32:64"
loop-idiom.ll 5 target datalayout = "e-p:32:32-p1:64:64-p2:64:64-p3:32:32-p4:32:32-p5:64:64-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-v2048:2048-n32:64"
wrong-transalu-pos-fix.ll 8 target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-v16:16:16-v24:32:32-v32:32:32-v48:64:64-v64:64:64-v96:128:128-v128:128:128-v192:256:256-v256:256:256-v512:512:512-v1024:1024:1024-v2048:2048:2048-n32:64"
si-vector-hang.ll 14 target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v16:16:16-v24:32:32-v32:32:32-v48:64:64-v64:64:64-v96:128:128-v128:128:128-v192:256:256-v256:256:256-v512:512:512-v1024:1024:1024-v2048:2048:2048-n32:64"
  /external/mesa3d/src/gallium/drivers/radeon/
AMDILSIDevice.cpp 46 "-v96:128:128-v128:128:128-v192:256:256-v256:256:256"
AMDGPUSubtarget.cpp 79 "-v96:128:128-v128:128:128-v192:256:256-v256:256:256"
AMDILDevice.cpp 134 "-v96:128:128-v128:128:128-v192:256:256-v256:256:256"
  /external/llvm/test/Bitcode/
highLevelStructure.3.2.ll 8 ; CHECK: target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v16:16:16-v24:32:32-v32:32:32-v48:64:64-v64:64:64-v96:128:128-v128:128:128-v192:256:256-v256:256:256-v512:512:512-v1024:1024:1024-a0:0:64-f80:32:32-n8:16:32-S32"
9 target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v16:16:16-v24:32:32-v32:32:32-v48:64:64-v64:64:64-v96:128:128-v128:128:128-v192:256:256-v256:256:256-v512:512:512-v1024:1024:1024-a0:0:64-f80:32:32-n8:16:32-S32"
  /external/clang/test/CodeGen/
target-data.c 115 // R600: target datalayout = "e-p:32:32-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-v2048:2048-n32:64"
119 // R600D: target datalayout = "e-p:32:32-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-v2048:2048-n32:64"
123 // R600SI: target datalayout = "e-p:32:32-p1:64:64-p2:64:64-p3:32:32-p4:64:64-p5:32:32-p24:64:64-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-v2048:2048-n32:64"
128 // R600SIDefault: target datalayout = "e-p:32:32-p1:64:64-p2:64:64-p3:32:32-p4:64:64-p5:32:32-p24:64:64-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-v2048:2048-n32:64"
168 // SPIR: target datalayout = "e-p:32:32-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024"
172 // SPIR64: target datalayout = "e-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024"
  /external/llvm/test/Transforms/SLPVectorizer/R600/
simplebb.ll 3 target datalayout = "e-p:32:32:32-p3:16:16:16-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-v16:16:16-v24:32:32-v32:32:32-v48:64:64-v64:64:64-v96:128:128-v128:128:128-v192:256:256-v256:256:256-v512:512:512-v1024:1024:1024-v2048:2048:2048-n32:64"
  /ndk/tests/device/test-stlport_shared-exception/jni/
pr29166.cpp 42 register int v251=OFF+251,v252=OFF+252,v253=OFF+253,v254=OFF+254,v255=OFF+255,v256=OFF+256,v257=OFF+257,v258=OFF+258,v259=OFF+259,v260=OFF+260; local
73 sum +=v251+v252+v253+v254+v255+v256+v257+v258+v259+v260;
116 register int v251=OFF+251,v252=OFF+252,v253=OFF+253,v254=OFF+254,v255=OFF+255,v256=OFF+256,v257=OFF+257,v258=OFF+258,v259=OFF+259,v260=OFF+260; local
150 sum +=v251+v252+v253+v254+v255+v256+v257+v258+v259+v260;
187 sum +=v251+v252+v253+v254+v255+v256+v257+v258+v259+v260;
  /ndk/tests/device/test-stlport_static-exception/jni/
pr29166.cpp 42 register int v251=OFF+251,v252=OFF+252,v253=OFF+253,v254=OFF+254,v255=OFF+255,v256=OFF+256,v257=OFF+257,v258=OFF+258,v259=OFF+259,v260=OFF+260; local
73 sum +=v251+v252+v253+v254+v255+v256+v257+v258+v259+v260;
116 register int v251=OFF+251,v252=OFF+252,v253=OFF+253,v254=OFF+254,v255=OFF+255,v256=OFF+256,v257=OFF+257,v258=OFF+258,v259=OFF+259,v260=OFF+260; local
150 sum +=v251+v252+v253+v254+v255+v256+v257+v258+v259+v260;
187 sum +=v251+v252+v253+v254+v255+v256+v257+v258+v259+v260;
  /external/llvm/test/Transforms/LoopVectorize/
runtime-check-readonly-address-space.ll 4 target datalayout = "e-p:32:32:32-p1:16:16:16-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-v16:16:16-v24:32:32-v32:32:32-v48:64:64-v64:64:64-v96:128:128-v128:128:128-v192:256:256-v256:256:256-v512:512:512-v1024:1024:1024-v2048:2048:2048-n32:64"
runtime-check-address-space.ll 20 target datalayout = "e-p:32:32:32-p1:16:16:16-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-v16:16:16-v24:32:32-v32:32:32-v48:64:64-v64:64:64-v96:128:128-v128:128:128-v192:256:256-v256:256:256-v512:512:512-v1024:1024:1024-v2048:2048:2048-n32:64"
  /external/valgrind/VEX/pub/
libvex_basictypes.h 92 V256;
libvex_ir.h 305 UInt V256; /* 32-bit value; see Ico_V256 comment above */
    [all...]
  /dalvik/dx/tests/122-switch-with-high-register/
expected.txt 258 01f0: move/from16 v0, v256
540 parameter <unnamed> v256
815 01f0: move/from16 v0, v256
1097 parameter param253 v256
  /external/llvm/lib/Target/R600/
AMDGPUTargetMachine.cpp 63 Ret += "-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256"
  /external/valgrind/memcheck/
mc_include.h 628 VG_REGPARM(2) void MC_(helperc_LOADV256be) ( /*OUT*/V256*, Addr );
629 VG_REGPARM(2) void MC_(helperc_LOADV256le) ( /*OUT*/V256*, Addr );
mc_translate.c 373 I64, I128, V128, V256. */
    [all...]

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