/external/jetty/src/java/org/eclipse/jetty/websocket/ |
FragmentExtension.java | 47 public void addFrame(byte flags, byte opcode, byte[] content, int offset, int length) throws IOException 49 if (getConnection().isControl(opcode)) 51 super.addFrame(flags,opcode,content,offset,length); 60 super.addFrame((byte)(flags&~getConnection().finMask()),opcode,content,offset,_maxLength); 63 opcode=getConnection().continuationOpcode(); 70 super.addFrame((byte)(flags&0x7),opcode,content,offset,frag); 73 opcode=getConnection().continuationOpcode(); 76 super.addFrame((byte)(flags|getConnection().finMask()),opcode,content,offset,length);
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WebSocketGenerator.java | 32 void addFrame(byte flags,byte opcode, byte[] content, int offset, int length) throws IOException;
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/external/v8/src/compiler/ |
operator.cc | 14 SimpleOperator::SimpleOperator(Opcode opcode, Properties properties, 17 : Operator(opcode, properties, mnemonic),
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graph-replay.cc | 44 IrOpcode::Value opcode = static_cast<IrOpcode::Value>(op->opcode()); local 46 IrOpcode::IsCommonOpcode(opcode) ? "common_builder" : "js_builder"; 47 const char* mnemonic = IrOpcode::IsCommonOpcode(opcode) 48 ? IrOpcode::Mnemonic(opcode) 49 : IrOpcode::Mnemonic(opcode) + 2; 51 switch (opcode) {
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/external/mockito/cglib-and-asm/src/org/mockito/asm/ |
MethodAdapter.java | 93 public void visitInsn(final int opcode) {
94 mv.visitInsn(opcode);
97 public void visitIntInsn(final int opcode, final int operand) {
98 mv.visitIntInsn(opcode, operand);
101 public void visitVarInsn(final int opcode, final int var) {
102 mv.visitVarInsn(opcode, var);
105 public void visitTypeInsn(final int opcode, final String type) {
106 mv.visitTypeInsn(opcode, type);
110 final int opcode,
115 mv.visitFieldInsn(opcode, owner, name, desc); [all...] |
MethodVisitor.java | 165 * @param opcode the opcode of the instruction to be visited. This opcode is
180 void visitInsn(int opcode);
185 * @param opcode the opcode of the instruction to be visited. This opcode is
188 * opcode is BIPUSH, operand value should be between Byte.MIN_VALUE
189 * and Byte.MAX_VALUE.<br> When opcode is SIPUSH, operand value
191 * opcode is NEWARRAY, operand value should be one of [all...] |
/external/mesa3d/src/mesa/drivers/dri/i915/ |
i915_debug_fp.c | 242 print_arith_op(GLuint opcode, const GLuint * program) 244 if (opcode != A0_NOP) { 252 printf("%s ", opcodes[opcode]); 255 if (args[opcode] == 1) { 262 if (args[opcode] == 2) { 275 print_tex_op(GLuint opcode, const GLuint * program) 280 printf("%s ", opcodes[opcode]); 291 print_dcl_op(GLuint opcode, const GLuint * program) 293 printf("%s ", opcodes[opcode]); 311 GLuint opcode = program[0] & (0x1f << 24) local [all...] |
/dalvik/opcode-gen/ |
regen-all | 37 ${progdir}/opcode-gen dx/src/com/android/dx/dex/code/Dops.java 38 ${progdir}/opcode-gen dx/src/com/android/dx/dex/code/RopToDop.java 39 ${progdir}/opcode-gen dx/src/com/android/dx/io/OpcodeInfo.java 40 ${progdir}/opcode-gen dx/src/com/android/dx/io/Opcodes.java 41 ${progdir}/opcode-gen libdex/DexOpcodes.cpp 42 ${progdir}/opcode-gen libdex/DexOpcodes.h 43 ${progdir}/opcode-gen libdex/InstrUtils.cpp 47 ${progdir}/opcode-gen \ 49 ${progdir}/opcode-gen \
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/frameworks/base/services/core/java/com/android/server/hdmi/ |
HdmiCecMessageCache.java | 23 * Cache for incoming message. It caches {@link HdmiCecMessage} with source address and opcode 38 // It's like [Source Logical Address, [Opcode, HdmiCecMessage]]. 46 * {@code opcode}. 49 * @param opcode opcode of message 51 * opcode} 53 public HdmiCecMessage getMessage(int address, int opcode) { 59 return messages.get(opcode); 79 * Cache incoming {@link HdmiCecMessage}. If opcode of message is not listed on 85 int opcode = message.getOpcode() local [all...] |
/art/disassembler/ |
disassembler_arm.cc | 252 std::string opcode; local 260 opcode = "bkpt"; 267 opcode = (((instruction >> 5) & 1) ? "blx" : "bx"); 274 opcode = kDataProcessingOperations[op]; 313 opcode = StringPrintf("%s%s", (l ? "ldr" : "str"), (b ? "b" : "")); 343 opcode = StringPrintf("%s%c%c", (l ? "ldm" : "stm"), (u ? 'i' : 'd'), (p ? 'b' : 'a')); 350 opcode = (bl ? "bl" : "b"); 357 opcode = "???"; 360 opcode += kConditionCodeNames[cond]; 361 opcode += suffixes 486 std::ostringstream opcode; local 1561 std::ostringstream opcode; local [all...] |
/external/mesa3d/src/gallium/auxiliary/rbug/ |
rbug_proto.h | 76 enum rbug_opcode opcode; member in struct:rbug_header 85 int32_t opcode; member in struct:rbug_proto_header 95 * Get printable string for opcode. 97 const char* rbug_proto_get_name(enum rbug_opcode opcode);
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/external/mesa3d/src/gallium/state_trackers/d3d1x/d3d1xshader/src/ |
sm4_analyze.cpp | 45 switch(program.insns[insn_num]->opcode) 53 check(program.insns[v]->opcode == SM4_OPCODE_LOOP); 67 if(program.insns[insn_num]->opcode == SM4_OPCODE_ELSE) 68 check(program.insns[v]->opcode == SM4_OPCODE_IF); 70 check(program.insns[v]->opcode == SM4_OPCODE_SWITCH || program.insns[v]->opcode == SM4_OPCODE_CASE); 79 if(program.insns[insn_num]->opcode == SM4_OPCODE_ENDIF) 80 check(program.insns[v]->opcode == SM4_OPCODE_IF || program.insns[v]->opcode == SM4_OPCODE_ELSE); 82 check(program.insns[v]->opcode == SM4_OPCODE_SWITCH || program.insns[v]->opcode == SM4_OPCODE_CASE) [all...] |
/system/bt/hci/include/ |
vendor.h | 61 int (*send_command)(vendor_opcode_t opcode, void *param); 64 int (*send_async_command)(vendor_async_opcode_t opcode, void *param); 67 void (*set_callback)(vendor_async_opcode_t opcode, vendor_cb callback);
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/art/runtime/ |
dex_instruction.cc | 63 #define INSTRUCTION_SIZE(opcode, c, p, format, r, i, a, v) \ 64 ((opcode == NOP) ? -1 : \ 76 switch (FormatOf(Opcode())) { 93 Code opcode = static_cast<Code>(insn & 0xFF); local 94 return FlagsOf(opcode) & Instruction::kContinue; 156 const char* opcode = kInstructionNames[Opcode()]; local 157 switch (FormatOf(Opcode())) { 158 case k10x: os << opcode; break; local 159 case k12x: os << StringPrintf("%s v%d, v%d", opcode, VRegA_12x(), VRegB_12x()); break 332 os << opcode << " {"; local 349 os << opcode << " {"; local 363 os << opcode << " {"; local [all...] |
/art/compiler/dex/quick/x86/ |
x86_lir.h | 357 // MR - Memory Register - opcode [base + disp], reg 359 // AR - Array Register - opcode [base + index * scale + disp], reg 361 // TR - Thread Register - opcode fs:[disp], reg - where fs: is equal to Thread::Current() 363 // RR - Register Register - opcode reg1, reg2 365 // RM - Register Memory - opcode reg, [base + disp] 367 // RA - Register Array - opcode reg, [base + index * scale + disp] 369 // RT - Register Thread - opcode reg, fs:[disp] - where fs: is equal to Thread::Current() 371 // RI - Register Immediate - opcode reg, #immediate 373 // MI - Memory Immediate - opcode [base + disp], #immediate 375 // AI - Array Immediate - opcode [base + index * scale + disp], #immediat 676 X86OpCode opcode; \/\/ e.g. kOpAddRI member in struct:art::X86EncodingMap 684 uint8_t opcode; \/\/ 1 byte opcode. member in struct:art::X86EncodingMap::__anon27 [all...] |
/external/mesa3d/src/gallium/drivers/r300/compiler/ |
radeon_swizzle.h | 44 * can be implemented natively by the hardware for this opcode. 46 * \return 1 if the swizzle is native for the given opcode 48 int (*IsNative)(rc_opcode opcode, struct rc_src_register reg);
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/external/smali/dexlib2/src/main/java/org/jf/dexlib2/dexbacked/instruction/ |
DexBackedInstruction21c.java | 34 import org.jf.dexlib2.Opcode; 44 @Nonnull Opcode opcode, 46 super(dexFile, opcode, instructionStart); 54 return DexBackedReference.makeReference(dexFile, opcode.referenceType, dexFile.readUshort(instructionStart + 2)); 59 return opcode.referenceType;
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DexBackedInstruction31c.java | 34 import org.jf.dexlib2.Opcode; 44 @Nonnull Opcode opcode, 46 super(dexFile, opcode, instructionStart); 54 return DexBackedReference.makeReference(dexFile, opcode.referenceType, 60 return opcode.referenceType;
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DexBackedInstruction3rc.java | 34 import org.jf.dexlib2.Opcode; 44 @Nonnull Opcode opcode, 46 super(dexFile, opcode, instructionStart); 61 return DexBackedReference.makeReference(dexFile, opcode.referenceType, 67 return opcode.referenceType;
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/art/runtime/quick/ |
inline_method_analyser.h | 140 InlineMethodOpcode opcode; member in struct:art::InlineMethod 162 static constexpr bool IsInstructionIGet(Instruction::Code opcode) { 163 return Instruction::IGET <= opcode && opcode <= Instruction::IGET_SHORT; 166 static constexpr bool IsInstructionIPut(Instruction::Code opcode) { 167 return Instruction::IPUT <= opcode && opcode <= Instruction::IPUT_SHORT; 170 static constexpr uint16_t IGetVariant(Instruction::Code opcode) { 171 return opcode - Instruction::IGET; 174 static constexpr uint16_t IPutVariant(Instruction::Code opcode) { [all...] |
/dalvik/dx/src/com/android/dx/io/instructions/ |
SparseSwitchPayloadDecodedInstruction.java | 38 int opcode, int[] keys, int[] targets) { 39 super(format, opcode, 0, null, 0, 0L);
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ZeroRegisterDecodedInstruction.java | 28 public ZeroRegisterDecodedInstruction(InstructionCodec format, int opcode, 30 super(format, opcode, index, indexType, target, literal);
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/external/dexmaker/src/dx/java/com/android/dx/io/instructions/ |
SparseSwitchPayloadDecodedInstruction.java | 38 int opcode, int[] keys, int[] targets) { 39 super(format, opcode, 0, null, 0, 0L);
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ZeroRegisterDecodedInstruction.java | 28 public ZeroRegisterDecodedInstruction(InstructionCodec format, int opcode, 30 super(format, opcode, index, indexType, target, literal);
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/external/mesa3d/src/mesa/drivers/dri/i965/ |
brw_shader.h | 32 uint32_t brw_math_function(enum opcode op);
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