/dalvik/dexgen/src/com/android/dexgen/rop/code/ |
Rop.java | 376 case RegOps.MUL:
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/dalvik/dx/src/com/android/dx/rop/code/ |
Rop.java | 376 case RegOps.MUL:
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/external/antlr/antlr-3.4/runtime/Ruby/test/functional/token-rewrite/ |
basic.rb | 284 MUL : '*';
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/external/dexmaker/src/dx/java/com/android/dx/rop/code/ |
Rop.java | 376 case RegOps.MUL:
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/external/libavc/decoder/ |
ih264d_defs.h | 55 #define MUL(x,y) ((x)*(y))
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/external/libhevc/common/arm/ |
ihevc_sao_edge_offset_class0.s | 101 MUL r4,r4,r1 @(ht - 1) * src_strd 148 MUL r14,r14,r1 @(ht - row) * src_strd 184 MUL r14,r14,r1 @II (ht - row) * src_strd 329 MUL r14,r14,r1 @(ht - row) * src_strd
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/external/v8/src/ |
token.h | 83 T(MUL, "*", 13) \
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/frameworks/av/media/libstagefright/codecs/amrwbenc/src/asm/ARMV7/ |
Syn_filt_32_neon.s | 78 MUL r12, r6, r3 @exc[i] * a0
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/packages/apps/Calculator/ |
arity-2.1.2.jar | |
/system/bt/embdrv/sbc/encoder/srce/ |
sbc_packing.c | 33 MUL s32OutLow,s32In1,s32In2; \
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/system/core/libpixelflinger/codeflinger/ |
ARMAssembler.h | 95 virtual void MUL(int cc, int s,
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ARMAssemblerProxy.h | 84 virtual void MUL(int cc, int s,
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MIPSAssembler.cpp | 618 mMips->MUL(R_at, Rm, Rs); 626 void ArmToMipsAssembler::MUL(int cc, int s, 629 mMips->MUL(Rd, Rm, Rs); [all...] |
texturing.cpp | 576 MUL(AL, 0, height, stride, height); 837 MUL(AL, 0, d, pixel, u); [all...] |
MIPSAssembler.h | 95 virtual void MUL(int cc, int s, 277 void MUL(int Rd, int Rs, int Rt);
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/external/mesa3d/src/mesa/drivers/dri/i965/ |
brw_vec4_visitor.cpp | 115 ALU2(MUL) 809 emit(MUL(dst, src_reg(dst), src_reg(1.0f / 65536.0f))); 1121 /* For integer multiplication, the MUL uses the low 16 bits 1126 * FINISHME: Emit just the MUL if we know an operand is small 1131 emit(MUL(acc, op[0], op[1])); 1135 emit(MUL(result_dst, op[0], op[1])); [all...] |
/external/webp/src/dsp/ |
dec_neon.c | [all...] |
/dalvik/dx/src/com/android/dx/ssa/ |
SCCP.java | 392 //TODO handle a constant of 0 with MUL or AND 416 case RegOps.MUL: 510 case RegOps.MUL:
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/external/dexmaker/src/dx/java/com/android/dx/ssa/ |
SCCP.java | 393 //TODO handle a constant of 0 with MUL or AND 417 case RegOps.MUL: 511 case RegOps.MUL:
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/external/mesa3d/src/mesa/program/ |
program_lexer.l | 217 MUL{sz}{cc}{sat} { return_opcode( 1, BIN_OP, MUL, 3); }
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/frameworks/av/media/libstagefright/codecs/on2/h264dec/omxdl/arm11/vc/m4p10/src/ |
armVCM4P10_DeblockingLuma_unsafe_s.s | 146 MUL tC0, t2, m01
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/frameworks/compile/mclinker/lib/Script/ |
BinaryOp.cpp | 27 IntOperand* BinaryOp<Operator::MUL>::eval(const Module& pModule,
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/external/llvm/lib/Target/Mips/ |
MipsSEISelLowering.cpp | 84 setOperationAction(ISD::MUL, MVT::v2i16, Legal); 120 setOperationAction(ISD::MUL, MVT::i64, Legal); 122 setOperationAction(ISD::MUL, MVT::i64, Custom); 144 setTargetDAGCombine(ISD::MUL); 160 setOperationAction(ISD::MUL, MVT::i32, Legal); 207 setOperationAction(ISD::MUL, MVT::i64, Legal); 264 setOperationAction(ISD::MUL, Ty, Legal); 369 case ISD::MUL: return lowerMulDiv(Op, MipsISD::Mult, true, false, DAG); [all...] |
/external/mesa3d/src/gallium/state_trackers/d3d1x/gd3d1x/ |
sm4_to_tgsi.cpp | 262 OP2(MUL); 547 OP2_(IMUL, MUL); 557 OP2_(UMUL, MUL);
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/external/mesa3d/src/gallium/drivers/nv30/ |
nvfx_fragprog.c | 582 nvfx_fp_emit(fpc, arith(0, MUL, tmp.reg, NVFX_FP_MASK_X | NVFX_FP_MASK_Y, src[0], src[1], none)); 640 nvfx_fp_emit(fpc, arith(0, MUL, tmp.reg, NVFX_FP_MASK_W, swz(tmp, W, W, W, W), swz(src[0], W, W, W, W), none)); 666 nvfx_fp_emit(fpc, arith(sat, MUL, dst, mask, src[0], src[1], none)); 676 nvfx_fp_emit(fpc, arith(0, MUL, tmp.reg, NVFX_FP_MASK_X, swz(tmp, X, X, X, X), swz(src[1], X, X, X, X), none)); 803 nvfx_fp_emit(fpc, arith(0, MUL, tmp.reg, mask, swz(src[0], Z, X, Y, Y), swz(src[1], Y, Z, X, X), none)); [all...] |