| /external/llvm/lib/Target/Hexagon/ |
| HexagonAsmPrinter.h | 53 static const char *getRegisterName(unsigned RegNo);
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| /external/llvm/lib/Target/MSP430/InstPrinter/ |
| MSP430InstPrinter.h | 33 static const char *getRegisterName(unsigned RegNo);
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| /external/llvm/lib/Target/Hexagon/MCTargetDesc/ |
| HexagonInstPrinter.h | 32 StringRef getRegName(unsigned RegNo) const;
33 static const char *getRegisterName(unsigned RegNo);
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| HexagonInstPrinter.cpp | 76 StringRef HexagonInstPrinter::getRegName(unsigned RegNo) const {
77 return getRegisterName(RegNo);
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| /external/llvm/lib/Target/PowerPC/InstPrinter/ |
| PPCInstPrinter.h | 34 void printRegName(raw_ostream &OS, unsigned RegNo) const override;
40 static const char *getRegisterName(unsigned RegNo);
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| /external/llvm/lib/Target/SystemZ/InstPrinter/ |
| SystemZInstPrinter.h | 31 static const char *getRegisterName(unsigned RegNo);
41 void printRegName(raw_ostream &O, unsigned RegNo) const override;
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| /external/llvm/lib/CodeGen/ |
| StackMaps.cpp | 79 int RegNo = TRI->getDwarfRegNum(Reg, false);
80 for (MCSuperRegIterator SR(Reg, TRI); SR.isValid() && RegNo < 0; ++SR)
81 RegNo = TRI->getDwarfRegNum(*SR, false);
83 assert(RegNo >= 0 && "Invalid Dwarf register number.");
84 return (unsigned) RegNo;
125 // The physical register number will ultimately be encoded as a DWARF regno.
140 unsigned RegNo = getDwarfRegNum(MOI->getReg(), TRI);
141 unsigned LLVMRegNo = TRI->getLLVMRegNum(RegNo, false);
147 Location(Location::Register, RC->getSize(), RegNo, Offset));
220 OS << " [encoding: .short " << LO.RegNo << ", .byte 0, .byte
[all...] |
| /external/llvm/lib/Target/R600/InstPrinter/ |
| AMDGPUInstPrinter.h | 30 static const char *getRegisterName(unsigned RegNo);
34 static void printRegOperand(unsigned RegNo, raw_ostream &O,
54 void printRegOperand(unsigned RegNo, raw_ostream &O);
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| /external/llvm/lib/Target/X86/AsmParser/ |
| X86Operand.h | 42 unsigned RegNo;
96 return Reg.RegNo;
370 static unsigned getGR32FromGR64(unsigned RegNo) {
371 switch (RegNo) {
395 unsigned RegNo = getReg();
396 if (X86MCRegisterClasses[X86::GR64RegClassID].contains(RegNo))
397 RegNo = getGR32FromGR64(RegNo);
398 Inst.addOperand(MCOperand::CreateReg(RegNo));
456 CreateReg(unsigned RegNo, SMLoc StartLoc, SMLoc EndLoc
[all...] |
| X86AsmParser.cpp | 717 bool OmitRegisterFromClobberLists(unsigned RegNo) override;
781 bool ParseRegister(unsigned &RegNo, SMLoc &StartLoc, SMLoc &EndLoc) override;
783 void SetFrameRegister(unsigned RegNo) override;
858 bool X86AsmParser::ParseRegister(unsigned &RegNo,
861 RegNo = 0;
879 RegNo = MatchRegisterName(Tok.getString());
882 if (RegNo == 0)
883 RegNo = MatchRegisterName(Tok.getString().lower());
891 if (RegNo == X86::RIZ ||
892 X86MCRegisterClasses[X86::GR64RegClassID].contains(RegNo) ||
[all...] |
| /external/llvm/include/llvm/CodeGen/ |
| CallingConvLower.h | 77 unsigned RegNo, MVT LocVT,
81 Ret.Loc = RegNo;
91 unsigned RegNo, MVT LocVT,
94 Ret = getReg(ValNo, ValVT, RegNo, LocVT, HTP);
129 void convertToReg(unsigned RegNo) {
130 Loc = RegNo;
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| /external/llvm/lib/Target/Mips/InstPrinter/ |
| MipsInstPrinter.h | 86 static const char *getRegisterName(unsigned RegNo);
88 void printRegName(raw_ostream &OS, unsigned RegNo) const override;
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| /external/llvm/lib/Target/NVPTX/InstPrinter/ |
| NVPTXInstPrinter.cpp | 35 void NVPTXInstPrinter::printRegName(raw_ostream &OS, unsigned RegNo) const {
38 unsigned RCId = (RegNo >> 28);
44 OS << getRegisterName(RegNo);
66 unsigned VReg = RegNo & 0x0FFFFFFF;
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| /external/llvm/lib/Target/Mips/MCTargetDesc/ |
| MipsTargetStreamer.cpp | 46 void MipsTargetStreamer::emitDirectiveSetAtWithArg(unsigned RegNo) {
86 void MipsTargetStreamer::emitDirectiveCpLoad(unsigned RegNo) {}
87 void MipsTargetStreamer::emitDirectiveCpsetup(unsigned RegNo, int RegOrOffset,
159 void MipsTargetAsmStreamer::emitDirectiveSetAtWithArg(unsigned RegNo) {
160 OS << "\t.set\tat=$" << Twine(RegNo) << "\n";
161 MipsTargetStreamer::emitDirectiveSetAtWithArg(RegNo);
332 void MipsTargetAsmStreamer::emitDirectiveCpLoad(unsigned RegNo) {
334 << StringRef(MipsInstPrinter::getRegisterName(RegNo)).lower() << "\n";
338 void MipsTargetAsmStreamer::emitDirectiveCpsetup(unsigned RegNo,
343 << StringRef(MipsInstPrinter::getRegisterName(RegNo)).lower() << ", "
[all...] |
| /external/llvm/lib/Target/Mips/AsmParser/ |
| MipsAsmParser.cpp | 129 bool ParseRegister(unsigned &RegNo, SMLoc &StartLoc, SMLoc &EndLoc) override;
272 unsigned getReg(int RC, int RegNo);
274 unsigned getGPR(int RegNo);
437 /// Warn if RegNo is the current assembler temporary.
438 void warnIfAssemblerTemporary(int RegNo, SMLoc Loc);
832 for (auto RegNo : getRegList())
833 Inst.addOperand(MCOperand::CreateReg(RegNo));
838 unsigned RegNo = getRegPair();
839 Inst.addOperand(MCOperand::CreateReg(RegNo++));
840 Inst.addOperand(MCOperand::CreateReg(RegNo));
[all...] |
| /external/llvm/lib/Target/R600/MCTargetDesc/ |
| R600MCCodeEmitter.cpp | 60 unsigned getHWReg(unsigned regNo) const;
166 unsigned R600MCCodeEmitter::getHWReg(unsigned RegNo) const {
167 return MRI.getEncodingValue(RegNo) & HW_REG_MASK;
|
| /external/llvm/lib/Target/Sparc/InstPrinter/ |
| SparcInstPrinter.cpp | 41 void SparcInstPrinter::printRegName(raw_ostream &OS, unsigned RegNo) const
43 OS << '%' << StringRef(getRegisterName(RegNo)).lower();
|
| /external/llvm/include/llvm/MC/ |
| MCInstPrinter.h | 77 virtual void printRegName(raw_ostream &OS, unsigned RegNo) const;
|
| /external/llvm/lib/MC/ |
| MCInstPrinter.cpp | 28 void MCInstPrinter::printRegName(raw_ostream &OS, unsigned RegNo) const {
|
| /external/llvm/lib/Target/X86/ |
| X86FloatingPoint.cpp | 173 unsigned getSlot(unsigned RegNo) const {
174 assert(RegNo < NumFPRegs && "Regno out of range!");
175 return RegMap[RegNo];
178 /// isLive - Is RegNo currently live in the stack?
179 bool isLive(unsigned RegNo) const {
180 unsigned Slot = getSlot(RegNo);
181 return Slot < StackTop && Stack[Slot] == RegNo;
192 /// FP<RegNo> register.
193 unsigned getSTReg(unsigned RegNo) const
[all...] |
| /external/llvm/lib/Target/XCore/Disassembler/ |
| XCoreDisassembler.cpp | 70 static unsigned getReg(const void *D, unsigned RC, unsigned RegNo) {
73 return *(RegInfo->getRegClass(RC).begin() + RegNo);
77 unsigned RegNo,
82 unsigned RegNo,
200 unsigned RegNo,
204 if (RegNo > 11)
206 unsigned Reg = getReg(Decoder, XCore::GRRegsRegClassID, RegNo);
212 unsigned RegNo,
216 if (RegNo > 15)
218 unsigned Reg = getReg(Decoder, XCore::RRegsRegClassID, RegNo);
[all...] |
| /external/llvm/lib/Target/R600/AsmParser/ |
| AMDGPUAsmParser.cpp | 80 unsigned RegNo;
180 return Reg.RegNo;
264 static std::unique_ptr<AMDGPUOperand> CreateReg(unsigned RegNo, SMLoc S,
268 Op->Reg.RegNo = RegNo;
327 bool ParseRegister(unsigned &RegNo, SMLoc &StartLoc, SMLoc &EndLoc) override;
427 bool AMDGPUAsmParser::ParseRegister(unsigned &RegNo, SMLoc &StartLoc, SMLoc &EndLoc) {
432 RegNo = getRegForName(RegName);
434 if (RegNo) {
489 RegNo = TRC->getRegClass(RC).getRegister(RegIndexInClass)
[all...] |
| /external/llvm/include/llvm/Target/ |
| TargetRegisterInfo.h | 333 unsigned getCostPerUse(unsigned RegNo) const {
334 return InfoDesc[RegNo].CostPerUse;
339 bool isInAllocatableClass(unsigned RegNo) const {
340 return InfoDesc[RegNo].inAllocatableClass;
[all...] |
| /external/llvm/lib/Target/ARM/Disassembler/ |
| ARMDisassembler.cpp | 141 static DecodeStatus DecodeGPRRegisterClass(MCInst &Inst, unsigned RegNo,
144 unsigned RegNo, uint64_t Address,
147 unsigned RegNo, uint64_t Address,
149 static DecodeStatus DecodetGPRRegisterClass(MCInst &Inst, unsigned RegNo,
151 static DecodeStatus DecodetcGPRRegisterClass(MCInst &Inst, unsigned RegNo,
153 static DecodeStatus DecoderGPRRegisterClass(MCInst &Inst, unsigned RegNo,
155 static DecodeStatus DecodeGPRPairRegisterClass(MCInst &Inst, unsigned RegNo,
157 static DecodeStatus DecodeSPRRegisterClass(MCInst &Inst, unsigned RegNo,
159 static DecodeStatus DecodeDPRRegisterClass(MCInst &Inst, unsigned RegNo,
161 static DecodeStatus DecodeDPR_8RegisterClass(MCInst &Inst, unsigned RegNo,
[all...] |
| /external/llvm/lib/Target/PowerPC/AsmParser/ |
| PPCAsmParser.cpp | 238 unsigned &RegNo, int64_t &IntVal);
240 bool ParseRegister(unsigned &RegNo, SMLoc &StartLoc, SMLoc &EndLoc) override;
[all...] |
