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    Searched refs:getRegInfo (Results 51 - 75 of 157) sorted by null

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  /external/llvm/lib/Target/X86/
X86VZeroUpper.cpp 254 MachineRegisterInfo &MRI = MF.getRegInfo();
X86FrameLowering.cpp 194 for (MachineRegisterInfo::livein_iterator II = MF.getRegInfo().livein_begin(),
195 EE = MF.getRegInfo().livein_end(); II != EE; ++II) {
385 const MachineRegisterInfo &MRI = MF.getRegInfo();
    [all...]
X86CallFrameOptimization.cpp 212 MRI = &MF.getRegInfo();
  /external/llvm/lib/CodeGen/
MachineBasicBlock.cpp 82 MachineRegisterInfo &RegInfo = MF.getRegInfo();
104 N->AddRegOperandsToUseLists(MF->getRegInfo());
115 N->RemoveRegOperandsFromUseLists(MF->getRegInfo());
352 MachineRegisterInfo &MRI = getParent()->getRegInfo();
872 MachineRegisterInfo *MRI = &getParent()->getRegInfo();
    [all...]
EarlyIfConversion.cpp 158 MRI = &MF.getRegInfo();
787 MRI = &MF.getRegInfo();
LocalStackSlotAllocation.cpp 396 BaseReg = Fn.getRegInfo().createVirtualRegister(RC);
MachineCopyPropagation.cpp 340 MRI = &MF.getRegInfo();
MachineSSAUpdater.cpp 43 MRI = &MF.getRegInfo();
TargetInstrInfo.cpp 362 const MachineRegisterInfo &MRI = MI->getParent()->getParent()->getRegInfo();
424 MF.getRegInfo().getRegClass(MO.getReg());
564 const MachineRegisterInfo &MRI = MF.getRegInfo();
    [all...]
LiveRangeCalc.cpp 34 MRI = &MF->getRegInfo();
MachineCombiner.cpp 412 MRI = &MF.getRegInfo();
RegisterScavenging.cpp 67 MRI = &MF.getRegInfo();
  /external/llvm/lib/Target/PowerPC/
PPCFrameLowering.cpp 311 if (MF->getRegInfo().isPhysRegUsed(VRRegNo[i]))
317 I = MF->getRegInfo().livein_begin(),
318 E = MF->getRegInfo().livein_end(); I != E; ++I) {
417 MachineRegisterInfo::def_iterator RI = MF.getRegInfo().def_begin(LR);
418 return RI !=MF.getRegInfo().def_end() || MFI->isLRStoreRequired();
    [all...]
  /external/llvm/lib/Target/R600/
SIInstrInfo.cpp 583 TIDReg = RI.findUnusedRegister(MF->getRegInfo(), &AMDGPU::VGPR_32RegClass);
    [all...]
  /external/llvm/lib/Target/AArch64/
AArch64A57FPLoadBalancing.cpp 318 MRI = &F.getRegInfo();
319 TRI = F.getRegInfo().getTargetRegisterInfo();
AArch64ConditionalCompares.cpp 196 MRI = &MF.getRegInfo();
897 MRI = &MF.getRegInfo();
AArch64AdvSIMDScalarPass.cpp 379 MRI = &mf.getRegInfo();
AArch64FrameLowering.cpp 347 assert(MF.getRegInfo().isPhysRegUsed(AArch64::X9) &&
718 bool LRLiveIn = MF.getRegInfo().isLiveIn(AArch64::LR);
    [all...]
AArch64InstrInfo.cpp 376 const MachineRegisterInfo &MRI = MBB.getParent()->getRegInfo();
417 MachineRegisterInfo &MRI = MBB.getParent()->getRegInfo();
712 MachineRegisterInfo *MRI = &MF->getRegInfo();
    [all...]
  /external/llvm/lib/Target/ARM/
Thumb1FrameLowering.cpp 367 assert(MF.getRegInfo().isPhysRegUsed(ARM::R4) &&
477 MF.getRegInfo().isLiveIn(Reg))
ThumbRegisterInfo.cpp 148 LdReg = MF.getRegInfo().createVirtualRegister(&ARM::tGPRRegClass);
595 VReg = MF.getRegInfo().createVirtualRegister(&ARM::tGPRRegClass);
MLxExpansionPass.cpp 383 MRI = &Fn.getRegInfo();
  /external/mesa3d/src/gallium/drivers/radeon/
R600ISelLowering.cpp 57 MachineRegisterInfo &MRI = MF->getRegInfo();
260 MachineRegisterInfo &MRI = MF.getRegInfo();
  /external/llvm/lib/Target/Mips/
Mips16ISelDAGToDAG.cpp 74 MachineRegisterInfo &RegInfo = MF.getRegInfo();
MipsSEISelLowering.cpp     [all...]

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