| /external/libvpx/libvpx/vp8/encoder/arm/armv6/ |
| vp8_short_fdct4x4_armv6.asm | 51 pkhbt r3, r4, r6, lsl #4 ; [o1 | o0], keep in register for PART 2
52 pkhbt r6, r5, r7, lsl #4 ; [o3 | o2]
76 pkhbt r9, r9, r6, lsl #4 ; [o5 | o4], keep in register for PART 2
77 pkhbt r6, r8, r7, lsl #4 ; [o7 | o6]
101 pkhbt r2, r2, r6, lsl #4 ; [o9 | o8], keep in register for PART 2
102 pkhbt r6, r8, r7, lsl #4 ; [o11 | o10]
122 pkhbt r0, r4, r6, lsl #4 ; [o13 | o12], keep in register for PART 2
123 pkhbt r6, r5, r7, lsl #4 ; [o15 | o14]
147 lsl r8, r2, #16 ; prepare bottom halfword for scaling
149 lsl r9, r3, #16 ; prepare bottom halfword for scalin
[all...] |
| /hardware/intel/common/omx-components/videocodec/libvpx_internal/libvpx/vp8/encoder/arm/armv5te/ |
| boolhuff_armv5te.asm | 86 lsl r5, r4, r6 ; range <<= shift
117 lsl r2, r2, r6 ; lowvalue <<= offset
129 lsl r2, r2, r6 ; lowvalue <<= shift
150 mov r4, r7, lsl #7 ; ((range-1) * 128)
162 lsl r5, r4, r6 ; range <<= shift
193 lsl r2, r2, r6 ; lowvalue <<= offset
205 lsl r2, r2, r6 ; lowvalue <<= shift
232 lsl r1, r1, r4 ; r1 = v << 32 - n
241 mov r4, r7, lsl #7 ; ((range-1) * 128)
256 lsl r5, r4, r6 ; range <<= shif
[all...] |
| vp8_packtokens_mbrow_armv5.asm | 84 add r4, r4, r6, lsl #3 ; a = vp8_coef_encodings + t
101 lsl r12, r6, r4 ; r12 = v << 32 - n
132 lsl r5, r4, r6 ; range <<= shift
163 lsl r2, r2, r6 ; lowvalue <<= offset
180 lsl r2, r2, r6 ; lowvalue <<= shift
189 add r12, r7, r6, lsl #4 ; b = vp8_extra_bits + t
208 lsl r12, r7, r4
230 lsl r5, r4, r6 ; range <<= shift
261 lsl r2, r2, r6 ; lowvalue <<= offset
273 lsl r2, r2, r
[all...] |
| vp8_packtokens_partitions_armv5.asm | 113 add r4, r4, r6, lsl #3 ; a = vp8_coef_encodings + t
130 lsl r12, r6, r4 ; r12 = v << 32 - n
161 lsl r5, r4, r6 ; range <<= shift
192 lsl r2, r2, r6 ; lowvalue <<= offset
209 lsl r2, r2, r6 ; lowvalue <<= shift
218 add r12, r7, r6, lsl #4 ; b = vp8_extra_bits + t
237 lsl r12, r7, r4
259 lsl r5, r4, r6 ; range <<= shift
290 lsl r2, r2, r6 ; lowvalue <<= offset
302 lsl r2, r2, r
[all...] |
| /hardware/intel/common/omx-components/videocodec/libvpx_internal/libvpx/vp8/encoder/arm/armv6/ |
| vp8_short_fdct4x4_armv6.asm | 51 pkhbt r3, r4, r6, lsl #4 ; [o1 | o0], keep in register for PART 2
52 pkhbt r6, r5, r7, lsl #4 ; [o3 | o2]
76 pkhbt r9, r9, r6, lsl #4 ; [o5 | o4], keep in register for PART 2
77 pkhbt r6, r8, r7, lsl #4 ; [o7 | o6]
101 pkhbt r2, r2, r6, lsl #4 ; [o9 | o8], keep in register for PART 2
102 pkhbt r6, r8, r7, lsl #4 ; [o11 | o10]
122 pkhbt r0, r4, r6, lsl #4 ; [o13 | o12], keep in register for PART 2
123 pkhbt r6, r5, r7, lsl #4 ; [o15 | o14]
147 lsl r8, r2, #16 ; prepare bottom halfword for scaling
149 lsl r9, r3, #16 ; prepare bottom halfword for scalin
[all...] |
| /bionic/libc/arch-arm64/generic/bionic/ |
| strlen.S | 111 lsl tmp1, tmp1, #3 /* Bytes beyond alignment -> bits. */
115 lsl tmp2, tmp2, tmp1 /* Shift (tmp1 & 63). */
|
| /external/libhevc/common/arm64/ |
| ihevc_inter_pred_chroma_copy_w16out.s | 116 lsl x12,x12,#1 //2*wd
130 lsl x6, x3,#1
166 sub x1,x10,x11,lsl #1
205 lsl x5, x3,#1
207 sub x20,x12,x3, lsl #2 // x11 = (dst_strd * 4) - width
209 sub x20,x12,x2,lsl #2 //x2->src_strd
244 add x20,x1,x11,lsl #1
291 add x20,x1,x11,lsl #1
|
| ihevc_intra_pred_chroma_dc.s | 117 add x6, x0, x4,lsl #1 //&src[2nt]
122 add x7, x0, x4, lsl #2 //&src[4nt]
132 lsl x10,x4,#1 //2nt
199 lsl x6, x3, #2
284 orr x10,x10,x11,lsl #8
|
| ihevc_deblk_luma_vert.s | 67 add x7,x3,x5,lsl #1
68 add x3,x3,x6,lsl #1
81 add x3,x3,x2,lsl #1
102 ldr w5,[x2,x7,lsl #2] // beta
104 ldr w6,[x4,x3,lsl #2] // tc
105 lsl x8,x6,#1
129 subs x9,x12,x9,lsl #1 // dq0 value is stored in x9
139 subs x8,x8,x10,lsl #1
145 add x14,x1,x1,lsl #1
164 subs x12,x12,x3,lsl #1 // dq3value is stored in x1
[all...] |
| ihevc_inter_pred_filters_luma_vert_w16out.s | 84 sub x12,x2,x2,lsl #2 //src_ctrd & pi1_coeff
103 sub x20,x4,x6,lsl #2 //x6->dst_strd x5 ->wd
105 sub x20,x4,x2,lsl #2 //x2->src_strd
107 lsl x6, x6, #1
155 add x20,x3, x2, lsl #1
160 add x20,x3, x2, lsl #1
179 add x20,x1,x9,lsl #1
251 add x20,x1,x9,lsl #1
258 add x10, x3, x2, lsl #3 // 10*strd - 8+2
272 add x20,x10, x2, lsl #
[all...] |
| /external/libvpx/libvpx/vp8/encoder/arm/armv5te/ |
| vp8_packtokens_partitions_armv5.asm | 113 add r4, r4, r6, lsl #3 ; a = vp8_coef_encodings + t
130 lsl r12, r6, r4 ; r12 = v << 32 - n
161 lsl r5, r4, r6 ; range <<= shift
192 lsl r2, r2, r6 ; lowvalue <<= offset
209 lsl r2, r2, r6 ; lowvalue <<= shift
218 add r12, r7, r6, lsl #4 ; b = vp8_extra_bits + t
237 lsl r12, r7, r4
259 lsl r5, r4, r6 ; range <<= shift
290 lsl r2, r2, r6 ; lowvalue <<= offset
302 lsl r2, r2, r
[all...] |
| /external/libvpx/libvpx/vp9/common/arm/neon/ |
| vp9_convolve8_neon.asm | 69 sub r8, r1, r1, lsl #2 ; -src_stride * 3
72 sub r4, r3, r3, lsl #2 ; -dst_stride * 3
75 rsb r9, r6, r1, lsl #2 ; reset src for outer loop
77 rsb r12, r6, r3, lsl #2 ; reset dst for outer loop
91 pld [r0, r1, lsl #2]
126 pld [r5, r1, lsl #1]
184 sub r0, r0, r1, lsl #1
192 lsl r1, r1, #1
193 lsl r3, r3, #1
|
| /hardware/intel/common/omx-components/videocodec/libvpx_internal/libvpx/vp9/common/arm/neon/ |
| vp9_convolve8_neon.asm | 69 sub r8, r1, r1, lsl #2 ; -src_stride * 3
72 sub r4, r3, r3, lsl #2 ; -dst_stride * 3
75 rsb r9, r6, r1, lsl #2 ; reset src for outer loop
77 rsb r12, r6, r3, lsl #2 ; reset dst for outer loop
91 pld [r0, r1, lsl #2]
126 pld [r5, r1, lsl #1]
184 sub r0, r0, r1, lsl #1
192 lsl r1, r1, #1
193 lsl r3, r3, #1
|
| /ndk/tests/build/ssax-instructions/jni/ |
| test.S | 18 lsl ip, lr, #2 label
19 lsl r3, lr, #3 label
|
| /external/libhevc/common/arm/ |
| ihevc_inter_pred_chroma_horz_w16out.s | 130 mov r5,r10,lsl #1 @2wd
170 pld [r12, r2, lsl #1]
182 pld [r4, r2, lsl #1]
199 lsl r6,#1
200 rsb r3,r5,r3,lsl #1
202 lsl r8,#1
203 rsb r7,r5,r2,lsl #1
215 pld [r12, r2, lsl #2]
216 pld [r4, r2, lsl #2]
225 @ addeq r12,r12,r2,lsl #
[all...] |
| ihevc_intra_pred_chroma_ver.s | 105 lsl r5, r4, #2 @4nt
122 lsl r11, r3, #2
192 lsl r11,r3,#2
209 @lsl r5, r4, #2 @4nt
|
| ihevc_intra_pred_filters_chroma_mode_19_to_25.s | 130 add r7, r7, r5, lsl #2 @gai4_ihevc_ang_table[mode]
131 add r8, r8, r5, lsl #2 @gai4_ihevc_inv_ang_table
138 add r6, sp, r4 , lsl #1 @ref_temp + 2 * nt
144 add r1, r0, r4, lsl #2 @r1 = &src[4nt]
190 add r6, sp, r4 ,lsl #1 @ref_temp + 2 * nt
197 add r1, r0, r4, lsl #2 @r1 = &src[2nt]
205 mov r0,r0, lsl #1
222 lsl r7,r4,#2 @four_nt
224 add r8,r6,r5,lsl #2 @*gai4_ihevc_ang_table[mode]
231 add r8, sp, r4, lsl #1 @ref_temp + 2 * n
[all...] |
| ihevc_weighted_pred_bi_default.s | 125 lsl r3,r3,#1
128 lsl r4,r4,#1
138 lsl r6,r9,#1
139 rsb r7,r6,r3,lsl #2 @4*src_strd1 - wd
140 rsb r10,r6,r4,lsl #2 @4*src_strd2 - wd
142 @rsb r6,r6,r5,lsl #2 @4*dst_strd - wd
214 rsb r14,r9,r5,lsl #2 @4*dst_strd - wd
226 rsb r7,r6,r3,lsl #1 @2*src_strd1 - wd
227 rsb r10,r6,r4,lsl #1 @2*src_strd2 - wd
255 rsb r14,r9,r5,lsl #1 @2*dst_strd - w
[all...] |
| ihevc_weighted_pred_bi.s | 166 lsl r5,r5,r14 @((off0 + off1 + 1) << (shift - 1))
172 lsl r9,r7,#1
174 lsl r3,r3,#1
176 lsl r4,r4,#1
252 rsb r11,r9,r3,lsl #2 @2*src_strd1 - wd
254 rsb r12,r9,r4,lsl #2 @2*src_strd2 - wd
258 rsb r10,r7,r5,lsl #2 @2*dst_strd - wd
|
| ihevc_intra_pred_chroma_dc.s | 115 add r6, r0, r4,lsl #1 @&src[2nt]
118 add r7, r0, r4, lsl #2 @&src[4nt]
128 lsl r10,r4,#1 @2nt
195 lsl r6, r3, #2
279 orr r10,r10,r11,lsl #8
|
| ihevc_intra_pred_chroma_mode2.s | 115 add r0,r0,r4,lsl #2
145 lsl r5, r3, #2
191 addle r2, r2, r3, lsl #2
204 addle r0, r0, r4,lsl #1
251 lsl r12,r4,#1
|
| ihevc_deblk_luma_vert.s | 70 add r7,r3,r5,lsl #1
71 add r3,r3,r6,lsl #1
82 add r3,r3,r2,lsl #1
102 ldr r5,[r2,r7,lsl #2] @ beta
104 ldr r6,[r4,r3,lsl #2] @ tc
105 lsl r8,r6,#1
126 subs r9,r12,r9,lsl #1 @ dq0 value is stored in r9
132 subs r8,r8,r10,lsl #1
138 add r14,r1,r1,lsl #1
156 subs r12,r12,r3,lsl #1 @ dq3value is stored in r1
[all...] |
| ihevc_intra_pred_chroma_mode_3_to_9.s | 137 add r7, r7, r5, lsl #2 @gai4_ihevc_ang_table[mode]
150 mov r11, r4, lsl #1 @col counter to be inc/dec by #8
158 add r12, r12, r7, lsl #4
162 sub r7, r7, r3, lsl #3 @r7 = 8-8r3
165 mov r9, r9, lsl #1
166 add r1, r0, r4, lsl #2 @pu1_ref + 4*nt
299 movle r11, r4, lsl #1
314 mov r9, r9, lsl #1
316 sub r5, r5, r0, lsl #1
365 movle r11, r4, lsl #
[all...] |
| /art/runtime/arch/arm/ |
| memcmp16_arm.S | 202 orr ip, ip, lr, lsl #16
207 orreq ip, ip, lr, lsl #16
212 orreq ip, ip, lr, lsl #16
217 orreq ip, ip, lr, lsl #16
|
| /frameworks/av/media/libstagefright/codecs/aacenc/src/asm/ARMV7/ |
| Radix4FFT_v7.s | 39 mov r5, r2, lsl #1
42 mov r5, r5, lsl #2
44 rsbeq r12, r5, r5, lsl #2
47 rsb r12, r5, r5, lsl #2
139 mov r2, r2, lsl #2
|
