| /external/libhevc/common/arm/ |
| ihevc_inter_pred_chroma_vert_w16inp_w16out.s | 111 lsl r2,r2,#1 @src_strd = 2* src_strd
129 lsl r7,r2,#1 @2*src_strd
130 lsl r3,r3,#1 @2*dst_strd
131 lsl r9,r6,#2 @4*wd
132 sub r6,r3,r6,lsl #1 @2*dst_strd - 2*wd
161 add r1,r1,r6,lsl #1 @pu1_dst += 2*dst_strd - 2*wd
169 lsl r7,r2,#2 @2*src_strd
170 lsl r10,r3,#2 @2*dst_strd
172 sub lr,r10,r6,lsl #1 @2*dst_strd - 2*wd
173 sub r8,r7,r6,lsl #2 @2*src_strd - 4*w
[all...] |
| ihevc_deblk_luma_horz.s | 67 add r7,r3,r5,lsl #1
68 add r3,r3,r6,lsl #1
78 add r3,r3,r2,lsl #1
97 ldr r5,[r2,r7,lsl #2] @ beta
98 ldr r6,[r4,r3,lsl #2] @ tc
105 lsl r7,r6,#1
106 add r14,r1,r1,lsl #1
109 ldr r10,[r0,-r1,lsl #1] @-2 value
120 ldr r2,[r0,r1,lsl #1] @ 2 value
128 subs r9,r12,r9,lsl #1 @ dq0 value is stored in r
[all...] |
| /external/libhevc/common/arm64/ |
| ihevc_inter_pred_chroma_horz_w16out.s | 138 lsl x5, x10, #1 //2wd
178 add x20,x12, x2 , lsl #1
193 add x20,x4, x2 , lsl #1
226 lsl x6,x6,#1
227 sub x20,x5,x3,lsl #1
230 lsl x8,x8,#1
231 sub x20,x5,x2,lsl #1
244 add x20,x12, x2 , lsl #2
246 add x20,x4, x2 , lsl #2
256 // add x20,x12,x2,lsl #
[all...] |
| ihevc_inter_pred_chroma_vert_w16inp_w16out.s | 116 lsl x2,x2,#1 //src_strd = 2* src_strd
134 lsl x7,x2,#1 //2*src_strd
135 lsl x3,x3,#1 //2*dst_strd
136 lsl x9,x6,#2 //4*wd
137 sub x6,x3,x6,lsl #1 //2*dst_strd - 2*wd
166 add x1,x1,x6,lsl #1 //pu1_dst += 2*dst_strd - 2*wd
174 lsl x7,x2,#2 //2*src_strd
175 lsl x10,x3,#2 //2*dst_strd
177 sub x14,x10,x6,lsl #1 //2*dst_strd - 2*wd
178 sub x8,x7,x6,lsl #2 //2*src_strd - 4*w
[all...] |
| ihevc_deblk_chroma_horz.s | 90 ldr w1, [x3,x1,lsl #2]
100 ldr w2, [x3,x2,lsl #2]
105 add x1,x1,x4,lsl #1
123 add x2,x2,x4,lsl #1
126 ldr w1, [x3,x1,lsl #2]
139 ldr w2, [x3,x2,lsl #2]
|
| ihevc_intra_pred_filters_chroma_mode_11_to_17.s | 119 add x7, x7, x5, lsl #2 //gai4_ihevc_ang_table[mode]
120 add x8, x8, x5, lsl #2 //gai4_ihevc_inv_ang_table[mode - 11]
129 add x6, sp, x4, lsl #1 //ref_temp + 2 * nt
135 add x1, x0, x4, lsl #2 //x1 = &src[4nt]
213 add x6, sp, x4, lsl #1 //ref_temp + 2 * nt
221 add x1, x0, x4, lsl #2 //x1 = &src[4nt]
230 lsl x0, x0, #1
250 lsl x11, x4, #1 //col counter to be inc/dec by #8
258 add x12, x12, x7, lsl #4
262 sub x7, x7, x3, lsl #3 //x7 = 8-8x
[all...] |
| ihevc_weighted_pred_uni.s | 150 lsl x22,x5,x6
155 lsl x2,x2,#1
157 lsl x22,x11,x12
161 lsl x4,x9,#1
228 sub x22,x4,x2,lsl #2 //2*src_strd - wd
233 sub x22,x9,x3,lsl #2 //2*dst_strd - wd
|
| ihevc_deblk_luma_horz.s | 67 add x7,x3,x5,lsl #1
68 add x3,x3,x6,lsl #1
80 add x3,x3,x2,lsl #1
100 ldr w5, [x2,x7,lsl #2] // beta
101 ldr w6, [x4,x3,lsl #2] // tc
108 lsl x7,x6,#1
109 add x14,x1,x1,lsl #1
113 lsl x19,x1,#1
127 lsl x19,x1,#1
136 subs x9,x12,x9,lsl #1 // dq0 value is stored in x
[all...] |
| /external/llvm/lib/Target/ARM/ |
| ARMSelectionDAGInfo.h | 26 case ISD::SHL: return ARM_AM::lsl;
|
| /external/llvm/test/MC/AArch64/ |
| basic-a64-instructions.s | 249 // LSL variant if sp involved
250 sub sp, x3, x7, lsl #4
251 add w2, wsp, w3, lsl #1
252 cmp wsp, w9, lsl #0
253 adds wzr, wsp, w3, lsl #4
254 subs x3, sp, x9, lsl #2
255 // CHECK: sub sp, x3, x7, lsl #4 // encoding: [0x7f,0x70,0x27,0xcb]
256 // CHECK: add w2, wsp, w3, lsl #1 // encoding: [0xe2,0x47,0x23,0x0b]
258 // CHECK: cmn wsp, w3, lsl #4 // encoding: [0xff,0x53,0x23,0x2b]
259 // CHECK: subs x3, sp, x9, lsl #2 // encoding: [0xe3,0x6b,0x29,0xeb
[all...] |
| jump-table.s | 16 ldr x0, [x0, x1, lsl #3]
|
| tls-relocs.s | 92 add x17, x18, #:dtprel_hi12:var, lsl #12
93 add w19, w20, #:dtprel_hi12:var, lsl #12
95 // CHECK: add x17, x18, :dtprel_hi12:var, lsl #12 // encoding: [0x51,0bAAAAAA10,0b00AAAAAA,0x91]
97 // CHECK: add w19, w20, :dtprel_hi12:var, lsl #12 // encoding: [0x93,0bAAAAAA10,0b00AAAAAA,0x11]
294 add x17, x18, #:tprel_hi12:var, lsl #12
295 add w19, w20, #:tprel_hi12:var, lsl #12
297 // CHECK: add x17, x18, :tprel_hi12:var, lsl #12 // encoding: [0x51,0bAAAAAA10,0b00AAAAAA,0x91]
299 // CHECK: add w19, w20, :tprel_hi12:var, lsl #12 // encoding: [0x93,0bAAAAAA10,0b00AAAAAA,0x11]
|
| /frameworks/av/media/libstagefright/codecs/amrwb/src/ |
| pvamrwbdecoder_basic_op_armv5.h | 69 mov L_var_out, var1, lsl #16
70 mov L_var_aux, var2, lsl #16
86 mov L_var_out, var1, lsl #16
87 mov L_var_aux, var2, lsl #16
|
| /hardware/intel/common/omx-components/videocodec/libvpx_internal/libvpx/vpx_scale/arm/neon/ |
| vp8_vpxyv12_copyframe_func_neon.asm | 83 add r2, r2, r6, lsl #1
84 add r3, r3, r7, lsl #1
135 add r2, r2, r6, lsl #1
136 add r3, r3, r7, lsl #1
190 add r2, r2, r6, lsl #1
191 add r3, r3, r7, lsl #1
225 add r2, r2, r6, lsl #1
226 add r3, r3, r7, lsl #1
|
| /bionic/libc/arch-arm/krait/bionic/ |
| memset.S | 96 movs ip, r2, lsl #29
101 2: movs ip, r2, lsl #31
|
| /frameworks/av/media/libstagefright/codecs/mp3dec/src/asm/ |
| pvmp3_dct_9_gcc.s | 73 mov r9,r1,lsl #1
86 mov r1,r12,lsl #1
109 mov r1,r6,lsl #1
118 mov r1,r5,lsl #1
124 mov r2,r4,lsl #1
128 mov r3,r3,lsl #1
134 mov r12,lr,lsl #1
140 mov lr,lr,lsl #1
|
| /frameworks/native/opengl/libagl/ |
| iterators.S | 84 adc r6, r6, r7, lsl #28
85 rsb r6, r6, r2, lsl #16
|
| /external/libavc/encoder/arm/ |
| ih264e_fmt_conv.s | 158 sub r3, r3, r6, lsl #1
255 add r8, r3, r5, lsl #1 @// pu2_yuv422i_nxt_row = pu2_yuv422i_y + u4_stride_yuv422i(2 Bytes for each pixel)
267 mov r14, r14, lsl #1 @// u2_offset_yuv422i = u2_offset_yuv422i * 2
272 add r5, r14, r5, lsl #1 @// u2_offset_yuv422i = u2_offset_yuv422i + u4_stride_yuv422i
315 sub r3, r3, r12, lsl #1
316 sub r8, r8, r12, lsl #1
|
| /external/libvpx/libvpx/vp8/common/arm/armv6/ |
| idct_v6.asm | 49 pkhbt r8, r8, r10, lsl #16 ; 5s | 4s
60 pkhbt r10, r10, r7, lsl #16 ; 13s | 12s
96 pkhbt r11, r6, r0, lsl #16 ; i0 | i4
99 pkhbt r8, r10, r8, lsl #16 ; 1s | 5s = temp1
102 pkhbt r9, r14, r12, lsl #16 ; i2 | i6
115 pkhbt r11, r14, r11, lsl #16 ; 3s | 7s = temp1
147 add r0, r0, r11, lsl #8 ; |--|--|d1|d0|
151 add r0, r0, r12, lsl #16 ; |--|d2|d1|d0|
163 add r0, r0, r11, lsl #24 ; |d3|d2|d1|d0|
178 add r12, r12, r11, lsl #8 ; |--|--|d5|d4
[all...] |
| sixtappredict8x4_v6.asm | 36 sub r0, r0, r1, lsl #1
41 add r2, r12, r2, lsl #4 ;calculate filter location
61 pkhbt r6, r6, r7, lsl #16 ; r7 | r6
62 pkhbt r7, r7, r8, lsl #16 ; r8 | r7
64 pkhbt r8, r8, r9, lsl #16 ; r9 | r8
65 pkhbt r9, r9, r10, lsl #16 ; r10 | r9
77 pkhbt r10, r10, r6, lsl #16 ; r10 | r9
78 pkhbt r6, r6, r7, lsl #16 ; r11 | r10
131 add lr, r12, r3, lsl #4 ;calculate filter location
183 sub r0, r0, r1, lsl #
[all...] |
| /external/libvpx/libvpx/vp9/common/arm/neon/ |
| vp9_convolve8_avg_neon.asm | 69 sub r8, r1, r1, lsl #2 ; -src_stride * 3
72 sub r4, r3, r3, lsl #2 ; -dst_stride * 3
75 rsb r9, r6, r1, lsl #2 ; reset src for outer loop
77 rsb r12, r6, r3, lsl #2 ; reset dst for outer loop
91 pld [r0, r1, lsl #2]
126 pld [r5, r1, lsl #1]
134 sub r2, r2, r3, lsl #2 ; reset for store
195 sub r0, r0, r1, lsl #1
203 lsl r1, r1, #1
204 lsl r3, r3, #
[all...] |
| /hardware/intel/common/omx-components/videocodec/libvpx_internal/libvpx/vp8/common/arm/armv6/ |
| idct_v6.asm | 49 pkhbt r8, r8, r10, lsl #16 ; 5s | 4s
60 pkhbt r10, r10, r7, lsl #16 ; 13s | 12s
96 pkhbt r11, r6, r0, lsl #16 ; i0 | i4
99 pkhbt r8, r10, r8, lsl #16 ; 1s | 5s = temp1
102 pkhbt r9, r14, r12, lsl #16 ; i2 | i6
115 pkhbt r11, r14, r11, lsl #16 ; 3s | 7s = temp1
147 add r0, r0, r11, lsl #8 ; |--|--|d1|d0|
151 add r0, r0, r12, lsl #16 ; |--|d2|d1|d0|
163 add r0, r0, r11, lsl #24 ; |d3|d2|d1|d0|
178 add r12, r12, r11, lsl #8 ; |--|--|d5|d4
[all...] |
| sixtappredict8x4_v6.asm | 36 sub r0, r0, r1, lsl #1
41 add r2, r12, r2, lsl #4 ;calculate filter location
61 pkhbt r6, r6, r7, lsl #16 ; r7 | r6
62 pkhbt r7, r7, r8, lsl #16 ; r8 | r7
64 pkhbt r8, r8, r9, lsl #16 ; r9 | r8
65 pkhbt r9, r9, r10, lsl #16 ; r10 | r9
77 pkhbt r10, r10, r6, lsl #16 ; r10 | r9
78 pkhbt r6, r6, r7, lsl #16 ; r11 | r10
131 add lr, r12, r3, lsl #4 ;calculate filter location
183 sub r0, r0, r1, lsl #
[all...] |
| /hardware/intel/common/omx-components/videocodec/libvpx_internal/libvpx/vp9/common/arm/neon/ |
| vp9_convolve8_avg_neon.asm | 69 sub r8, r1, r1, lsl #2 ; -src_stride * 3
72 sub r4, r3, r3, lsl #2 ; -dst_stride * 3
75 rsb r9, r6, r1, lsl #2 ; reset src for outer loop
77 rsb r12, r6, r3, lsl #2 ; reset dst for outer loop
91 pld [r0, r1, lsl #2]
126 pld [r5, r1, lsl #1]
134 sub r2, r2, r3, lsl #2 ; reset for store
195 sub r0, r0, r1, lsl #1
203 lsl r1, r1, #1
204 lsl r3, r3, #
[all...] |
| /bionic/libc/arch-arm/generic/bionic/ |
| memcmp.S | 262 orr ip, ip, lr, lsl #16
267 orreq ip, ip, lr, lsl #16
272 orreq ip, ip, lr, lsl #16
277 orreq ip, ip, lr, lsl #16
305 mov r5, r0, lsl #3 /* r5 = right shift */
316 orr ip, ip, r7, lsl r6
321 orreq ip, ip, r7, lsl r6
|
