| /external/llvm/test/CodeGen/X86/ |
| fold-vector-sext-crash.ll | 3 ; Make sure that we don't introduce illegal build_vector dag nodes
4 ; when trying to fold a sign_extend of a constant build_vector.
6 ; due to an illegal build_vector of type MVT::v4i64.
|
| 2011-12-28-vselecti8.ll | 7 ; wider BUILD_VECTOR. This causes the introduction of a new
11 ; always folded into a simple build_vector.
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| dagcombine-buildvector.ll | 4 ; with v2i64 build_vector i32, i32.
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| selectiondag-crash.ll | 4 ; a splat mask into a constant build_vector.
|
| vbinop-simplify-bug.ll | 12 ; Cannot select: 0x2e329d0: v4i32 = BUILD_VECTOR 0x2e2ea00, 0x2e2ea00, 0x2e2ea00, 0x2e2ea00
|
| vec_shift6.ll | 7 ; signed integers if the amount is a constant build_vector.
30 ; counts is a constant build_vector.
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| lower-vec-shift.ll | 8 ; packed shift right by a constant build_vector the backend should always try to
|
| vselect.ll | 126 ; Fold (vselect (build_vector AllOnes), N1, N2) -> N1
143 ; Fold (vselect (build_vector AllZeros), N1, N2) -> N2
|
| /external/llvm/test/CodeGen/AArch64/ |
| arm64-build-vector.ll | 48 ; fold (concat_vectors (BUILD_VECTOR A, B, ...), (BUILD_VECTOR C, D, ...))
49 ; -> (BUILD_VECTOR A, B, ..., C, D, ...)
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| arm64-ext.ll | 95 ; chosen to reach lowering phase as a BUILD_VECTOR.
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| /external/llvm/test/CodeGen/Mips/msa/ |
| llvm-stress-sz1-s742806235.ll | 7 ; build_vector.
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| /external/llvm/test/CodeGen/R600/ |
| simplify-demanded-bits-build-pair.ll | 7 ; it started being implemented with a v2i32 build_vector and
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| /external/llvm/lib/Target/Mips/ |
| MipsMSAInstrInfo.td | 227 (v16i8 (build_vector node:$e0, node:$e0,
236 (v8i16 (build_vector node:$e0, node:$e0,
241 (v4i32 (build_vector node:$e0, node:$e0,
244 (v2i64 (build_vector node:$e0, node:$e0))>;
246 (v4f32 (build_vector node:$e0, node:$e0,
249 (v2f64 (build_vector node:$e0, node:$e0))>;
275 [build_vector, bitconvert]>;
279 [build_vector, bitconvert]>;
283 [build_vector, bitconvert]>;
287 [build_vector, bitconvert]>
[all...] |
| MipsSEISelLowering.cpp | 258 setOperationAction(ISD::BUILD_VECTOR, Ty, Custom);
307 setOperationAction(ISD::BUILD_VECTOR, Ty, Custom);
377 case ISD::BUILD_VECTOR: return lowerBUILD_VECTOR(Op, DAG);
594 // * N is a ISD::BUILD_VECTOR representing a constant splat
619 // Test whether the given node is an all-ones build_vector.
[all...] |
| /external/llvm/lib/Target/R600/ |
| R600ISelLowering.cpp | 699 return DAG.getNode(ISD::BUILD_VECTOR, DL, MVT::v2f32,
[all...] |
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| LegalizeVectorTypes.cpp | 53 case ISD::BUILD_VECTOR: R = ScalarizeVecRes_BUILD_VECTOR(N); break;
168 // The BUILD_VECTOR operands may be of wider element types and
487 return DAG.getNode(ISD::BUILD_VECTOR, SDLoc(N), N->getValueType(0), Op);
491 /// use a BUILD_VECTOR instead.
496 return DAG.getNode(ISD::BUILD_VECTOR, SDLoc(N), N->getValueType(0), Ops);
588 case ISD::BUILD_VECTOR: SplitVecRes_BUILD_VECTOR(N, Lo, Hi); break;
775 Lo = DAG.getNode(ISD::BUILD_VECTOR, dl, LoVT, LoOps);
778 Hi = DAG.getNode(ISD::BUILD_VECTOR, dl, HiVT, HiOps);
[all...] |
| LegalizeTypesGeneric.cpp | 364 SDValue Vec = DAG.getNode(ISD::BUILD_VECTOR, dl, NVT,
382 "BUILD_VECTOR operand type doesn't match vector element type!");
398 SDValue NewVec = DAG.getNode(ISD::BUILD_VECTOR, dl,
460 return DAG.getNode(ISD::BUILD_VECTOR, dl, VT, Ops);
|
| LegalizeVectorOps.cpp | 22 // This does not legalize vector manipulations like ISD::BUILD_VECTOR,
615 SDValue Value = DAG.getNode(ISD::BUILD_VECTOR, dl,
723 // Also, we need to be able to construct a splat vector using BUILD_VECTOR.
727 TLI.getOperationAction(ISD::BUILD_VECTOR, VT) == TargetLowering::Expand)
742 Mask = DAG.getNode(ISD::BUILD_VECTOR, DL, MaskTy, Ops);
841 SDValue Zero = DAG.getNode(ISD::BUILD_VECTOR, DL, SrcVT, BuildVectorOperands);
[all...] |
| SelectionDAG.cpp | 96 /// BUILD_VECTOR where all of the elements are ~0 or undef.
102 if (N->getOpcode() != ISD::BUILD_VECTOR) return false;
144 /// BUILD_VECTOR where all of the elements are 0 or undef.
150 if (N->getOpcode() != ISD::BUILD_VECTOR) return false;
183 /// \brief Return true if the specified node is a BUILD_VECTOR node of
186 if (N->getOpcode() != ISD::BUILD_VECTOR)
199 /// \brief Return true if the specified node is a BUILD_VECTOR node of
202 if (N->getOpcode() != ISD::BUILD_VECTOR)
216 /// ISD::SCALAR_TO_VECTOR node or a BUILD_VECTOR node where only the low
222 if (N->getOpcode() != ISD::BUILD_VECTOR)
[all...] |
| /external/llvm/test/CodeGen/ARM/ |
| vector-DAGCombine.ll | 72 ; Test folding a binary vector operation with constant BUILD_VECTOR
136 ; a BUILD_VECTOR with i32 0 operands, which did not match the i16 operands
137 ; of the other BUILD_VECTOR.
|
| vext.ll | 111 ; chosen to reach lowering phase as a BUILD_VECTOR.
137 ; We should ignore a build_vector with more than two sources.
|
| /external/llvm/lib/Target/X86/ |
| X86ISelLowering.cpp | [all...] |
| /external/llvm/lib/Target/X86/Utils/ |
| X86ShuffleDecode.h | 76 /// BUILD_VECTOR.
|
| /external/llvm/lib/Target/PowerPC/ |
| PPCInstrAltivec.td | 186 // VSPLTISB_get_imm xform function: convert build_vector to VSPLTISB imm.
187 def VSPLTISB_get_imm : SDNodeXForm<build_vector, [{
190 def vecspltisb : PatLeaf<(build_vector), [{
194 // VSPLTISH_get_imm xform function: convert build_vector to VSPLTISH imm.
195 def VSPLTISH_get_imm : SDNodeXForm<build_vector, [{
198 def vecspltish : PatLeaf<(build_vector), [{
202 // VSPLTISW_get_imm xform function: convert build_vector to VSPLTISW imm.
203 def VSPLTISW_get_imm : SDNodeXForm<build_vector, [{
206 def vecspltisw : PatLeaf<(build_vector), [{
[all...] |
| /external/llvm/test/CodeGen/PowerPC/ |
| vaddsplat.ll | 3 ; Test optimizations of build_vector for 6-bit immediates.
|
