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  /prebuilts/gcc/linux-x86/host/x86_64-linux-glibc2.15-4.8/sysroot/usr/include/x86_64-linux-gnu/bits/
mathinline.h 86 __asm ("cvtss2si %1, %0" : "=r" (__res) : "xm" (__x));
104 __asm ("cvtss2si %1, %0" : "=r" (__res) : "xm" (__x));
  /external/llvm/test/Transforms/ConstProp/
calls.ll 36 %i0 = tail call i32 @llvm.x86.sse.cvtss2si(<4 x float> <float 1.75, float undef, float undef, float undef>) nounwind
55 declare i32 @llvm.x86.sse.cvtss2si(<4 x float>) nounwind readnone
  /external/llvm/test/CodeGen/X86/
sse-intrinsics-x86.ll 96 ; CHECK: cvtss2si
97 %res = call i32 @llvm.x86.sse.cvtss2si(<4 x float> %a0) ; <i32> [#uses=1]
100 declare i32 @llvm.x86.sse.cvtss2si(<4 x float>) nounwind readnone
stack-folding-fp-sse42.ll 417 ;CHECK: cvtss2si {{-?[0-9]*}}(%rsp), %eax {{.*#+}} 16-byte Folded Reload
419 %2 = call i32 @llvm.x86.sse.cvtss2si(<4 x float> %a0)
422 declare i32 @llvm.x86.sse.cvtss2si(<4 x float>) nounwind readnone
428 ;CHECK: cvtss2si {{-?[0-9]*}}(%rsp), %rax {{.*#+}} 16-byte Folded Reload
    [all...]
stack-folding-fp-avx1.ll     [all...]
avx-intrinsics-x86.ll     [all...]
  /external/valgrind/memcheck/tests/amd64/
sse_memory.c 204 //TEST_INSN( &AllMask, 0,cvtss2si)
435 //TEST_INSN( &AllMask, 0,cvtss2si)
  /art/compiler/utils/x86_64/
assembler_x86_64_test.cc     [all...]
assembler_x86_64.h 401 void cvtss2si(CpuRegister dst, XmmRegister src); // Note: this is the r32 version.
assembler_x86_64.cc 715 void X86_64Assembler::cvtss2si(CpuRegister dst, XmmRegister src) { function in class:art::x86_64::X86_64Assembler
    [all...]
  /external/valgrind/none/tests/amd64/
insn_sse.def 53 cvtss2si xmm.ps[12.34,56.78,43.21,87.65] r32.sd[99] => 1.sd[12]
54 cvtss2si m128.ps[56.78,12.34,87.65,43.21] r32.sd[99] => 1.sd[57]
  /external/valgrind/none/tests/x86/
insn_sse.def 53 cvtss2si xmm.ps[12.34,56.78,43.21,87.65] r32.sd[99] => 1.sd[12]
54 cvtss2si m128.ps[56.78,12.34,87.65,43.21] r32.sd[99] => 1.sd[57]
  /art/compiler/utils/x86/
assembler_x86.h 299 void cvtss2si(Register dst, XmmRegister src);
assembler_x86.cc 600 void X86Assembler::cvtss2si(Register dst, XmmRegister src) { function in class:art::x86::X86Assembler
    [all...]
  /external/llvm/test/Transforms/InstCombine/
vec_demanded_elts.ll 49 %tmp0 = tail call i32 @llvm.x86.sse.cvtss2si(<4 x float> %v03)
132 declare i32 @llvm.x86.sse.cvtss2si(<4 x float>)
  /external/elfutils/src/tests/
testfile44.expect.bz2 
  /art/disassembler/
disassembler_x86.cc 503 opcode1 = "cvtss2si";
    [all...]
  /external/llvm/lib/Target/X86/
X86InstrSSE.td     [all...]
X86InstrAVX512.td     [all...]
  /external/mesa3d/src/mesa/x86/
assyntax.h     [all...]
  /external/elfutils/src/libcpu/defs/
i386 665 11110011,00001111,00101101,{Mod}{reg}{R_m}:cvtss2si {Mod}{R_m},{reg}
    [all...]
  /external/mesa3d/src/gallium/auxiliary/gallivm/
lp_bld_arit.c     [all...]
  /art/compiler/dex/quick/x86/
assemble_x86.cc     [all...]
  /external/valgrind/VEX/priv/
guest_amd64_toIR.c     [all...]
  /external/google-breakpad/src/third_party/libdisasm/
ia32_opcode_tables.c     [all...]

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