| /art/compiler/dex/quick/mips/ |
| int_mips.cc | 304 bool is_div) {
308 NewLIR3(is_div ? kMipsR6Div : kMipsR6Mod, rl_result.reg.GetReg(), reg1.GetReg(), reg2.GetReg());
311 NewLIR1(is_div ? kMipsR2Mflo : kMipsR2Mfhi, rl_result.reg.GetReg());
316 RegLocation MipsMir2Lir::GenDivRemLit(RegLocation rl_dest, RegStorage reg1, int lit, bool is_div) {
325 RegLocation rl_result = GenDivRem(rl_dest, reg1, t_reg, is_div);
331 bool is_div, int flags) {
332 UNUSED(rl_dest, rl_src1, rl_src2, is_div, flags);
338 bool is_div) {
339 UNUSED(rl_dest, rl_src1, lit, is_div);
465 bool MipsMir2Lir::SmallLiteralDivRem(Instruction::Code dalvik_opcode, bool is_div,
[all...] |
| codegen_mips.h | 73 bool SmallLiteralDivRem(Instruction::Code dalvik_opcode, bool is_div, RegLocation rl_src,
169 RegLocation GenDivRem(RegLocation rl_dest, RegStorage reg_lo, RegStorage reg_hi, bool is_div);
170 RegLocation GenDivRemLit(RegLocation rl_dest, RegStorage reg_lo, int lit, bool is_div);
241 RegLocation GenDivRem(RegLocation rl_dest, RegLocation rl_src1, RegLocation rl_src2, bool is_div,
243 RegLocation GenDivRemLit(RegLocation rl_dest, RegLocation rl_src1, int lit, bool is_div) OVERRIDE;
280 RegLocation rl_src2, bool is_div, int flags);
|
| /art/compiler/dex/quick/arm64/ |
| codegen_arm64.h | 54 bool SmallLiteralDivRem(Instruction::Code dalvik_opcode, bool is_div, RegLocation rl_src,
56 bool HandleEasyDivRem(Instruction::Code dalvik_opcode, bool is_div,
58 bool HandleEasyDivRem64(Instruction::Code dalvik_opcode, bool is_div,
167 RegLocation GenDivRem(RegLocation rl_dest, RegStorage reg_lo, RegStorage reg_hi, bool is_div)
169 RegLocation GenDivRemLit(RegLocation rl_dest, RegStorage reg_lo, int lit, bool is_div)
348 bool is_div, int flags) OVERRIDE;
349 RegLocation GenDivRemLit(RegLocation rl_dest, RegLocation rl_src1, int lit, bool is_div) OVERRIDE;
352 bool SmallLiteralDivRem64(Instruction::Code dalvik_opcode, bool is_div, RegLocation rl_src,
398 RegLocation rl_src2, bool is_div, int flags);
|
| int_arm64.cc | 416 bool Arm64Mir2Lir::SmallLiteralDivRem(Instruction::Code dalvik_opcode, bool is_div,
427 if (!is_div) {
460 bool Arm64Mir2Lir::SmallLiteralDivRem64(Instruction::Code dalvik_opcode, bool is_div,
471 if (!is_div) {
529 bool Arm64Mir2Lir::HandleEasyDivRem(Instruction::Code dalvik_opcode, bool is_div,
531 return HandleEasyDivRem64(dalvik_opcode, is_div, rl_src, rl_dest, static_cast<int>(lit));
536 bool Arm64Mir2Lir::HandleEasyDivRem64(Instruction::Code dalvik_opcode, bool is_div,
546 return SmallLiteralDivRem64(dalvik_opcode, is_div, rl_src, rl_dest, lit);
548 return SmallLiteralDivRem(dalvik_opcode, is_div, rl_src, rl_dest, static_cast<int32_t>(lit));
570 if (is_div) {
[all...] |
| /art/compiler/dex/quick/arm/ |
| codegen_arm.h | 62 bool SmallLiteralDivRem(Instruction::Code dalvik_opcode, bool is_div, RegLocation rl_src,
168 RegLocation GenDivRem(RegLocation rl_dest, RegStorage reg_lo, RegStorage reg_hi, bool is_div);
169 RegLocation GenDivRemLit(RegLocation rl_dest, RegStorage reg_lo, int lit, bool is_div);
277 bool HandleEasyDivRem(Instruction::Code dalvik_opcode, bool is_div,
294 bool is_div, int flags) OVERRIDE;
295 RegLocation GenDivRemLit(RegLocation rl_dest, RegLocation rl_src1, int lit, bool is_div) OVERRIDE;
|
| int_arm.cc | 519 bool ArmMir2Lir::SmallLiteralDivRem(Instruction::Code dalvik_opcode, bool is_div,
539 RegStorage r_div_result = is_div ? rl_result.reg : r_hi;
561 if (!is_div) {
716 RegLocation rl_src2, bool is_div, int flags) {
717 UNUSED(rl_dest, rl_src1, rl_src2, is_div, flags);
723 bool is_div) {
724 UNUSED(rl_dest, rl_src1, lit, is_div);
729 RegLocation ArmMir2Lir::GenDivRemLit(RegLocation rl_dest, RegStorage reg1, int lit, bool is_div) {
737 rl_result = GenDivRem(rl_result, reg1, lit_temp, is_div);
744 bool is_div) {
[all...] |
| /art/compiler/dex/quick/x86/ |
| int_x86.cc | 600 RegLocation X86Mir2Lir::GenDivRemLit(RegLocation rl_dest, RegStorage reg_lo, int lit, bool is_div) {
601 UNUSED(rl_dest, reg_lo, lit, is_div);
607 int imm, bool is_div) {
613 if (is_div) {
622 if (is_div) {
643 } else if (is_div && IsPowerOfTwo(std::abs(imm))) {
701 rl_result = {kLocPhysReg, 0, 0, 0, 0, 0, 0, 0, 1, is_div ? rs_r2 : rs_r0,
749 if (!is_div) {
770 bool is_div) {
771 UNUSED(rl_dest, reg_lo, reg_hi, is_div);
[all...] |
| codegen_x86.h | 83 bool SmallLiteralDivRem(Instruction::Code dalvik_opcode, bool is_div, RegLocation rl_src,
259 RegLocation GenDivRem(RegLocation rl_dest, RegStorage reg_lo, RegStorage reg_hi, bool is_div)
261 RegLocation GenDivRemLit(RegLocation rl_dest, RegStorage reg_lo, int lit, bool is_div) OVERRIDE;
531 void GenDivRemLongLit(RegLocation rl_dest, RegLocation rl_src, int64_t imm, bool is_div);
[all...] |
| /packages/apps/ExactCalculator/src/com/android/calculator2/ |
| CalculatorExpr.java | [all...] |
| /art/compiler/optimizing/ |
| builder.h | 154 bool is_div);
|
| code_generator_x86.cc | 80 explicit DivRemMinusOneSlowPathX86(Register reg, bool is_div) : reg_(reg), is_div_(is_div) {}
2467 bool is_div = instruction->IsDiv(); local
[all...] |
| code_generator_x86_64.cc | 85 explicit DivRemMinusOneSlowPathX86_64(Register reg, Primitive::Type type, bool is_div)
86 : cpu_reg_(CpuRegister(reg)), type_(type), is_div_(is_div) {}
2676 bool is_div = instruction->IsDiv(); local
[all...] |
| /art/compiler/dex/quick/ |
| gen_common.cc | 1807 bool is_div = false; local
[all...] |
| mir_to_lir.h | [all...] |
| /external/valgrind/none/tests/ppc32/ |
| jm-insns.c | 4740 int i, j, is_div; local
[all...] |
