| /external/llvm/test/MC/Disassembler/ARM/ |
| arm-LDREXD-reencoding.txt | 9 # CHECK: ldrexd r0, r1, [r0] @ encoding: [0x9f,0x0f,0xb0,0xe1]
10 # CHECK: ldrexd r12, sp, [r1] @ encoding: [0x9f,0xcf,0xb1,0xe1]
11 # CHECK: ldrexd r12, sp, [r3] @ encoding: [0x9f,0xcf,0xb3,0xe1]
12 # CHECK: ldrexd r8, r9, [sp] @ encoding: [0x9f,0x8f,0xbd,0xe1]
13 # CHECK: ldrexd r12, sp, [lr] @ encoding: [0x9f,0xcf,0xbe,0xe1]
|
| invalid-thumbv7-xfail.txt | 5 # Undefined encodings for ldrexd/strexd
8 # FIXME: "ldrexd r8, r8, [r2]"
|
| thumb-tests.txt | 167 # CHECK: ldrexd r8, r9, [r2]
|
| /external/llvm/test/CodeGen/ARM/ |
| gpr-paired-spill-thumbinst.ll | 9 %val1 = tail call i64 asm sideeffect "ldrexd $0, ${0:H}, [r0]", "=&r,r"(i64* %addr)
10 %val2 = tail call i64 asm sideeffect "ldrexd $0, ${0:H}, [r0]", "=&r,r"(i64* %addr)
11 %val3 = tail call i64 asm sideeffect "ldrexd $0, ${0:H}, [r0]", "=&r,r"(i64* %addr)
12 %val4 = tail call i64 asm sideeffect "ldrexd $0, ${0:H}, [r0]", "=&r,r"(i64* %addr)
13 %val5 = tail call i64 asm sideeffect "ldrexd $0, ${0:H}, [r0]", "=&r,r"(i64* %addr)
14 %val6 = tail call i64 asm sideeffect "ldrexd $0, ${0:H}, [r0]", "=&r,r"(i64* %addr)
15 %val7 = tail call i64 asm sideeffect "ldrexd $0, ${0:H}, [r0]", "=&r,r"(i64* %addr)
|
| PR15053.ll | 5 declare { i32, i32 } @llvm.arm.ldrexd(i8*) nounwind readonly
9 %0 = tail call { i32, i32 } @llvm.arm.ldrexd(i8* undef) nounwind
|
| gpr-paired-spill.ll | 6 %val1 = tail call i64 asm sideeffect "ldrexd $0, ${0:H}, [r0]", "=&r,r"(i64* %addr)
7 %val2 = tail call i64 asm sideeffect "ldrexd $0, ${0:H}, [r0]", "=&r,r"(i64* %addr)
8 %val3 = tail call i64 asm sideeffect "ldrexd $0, ${0:H}, [r0]", "=&r,r"(i64* %addr)
9 %val4 = tail call i64 asm sideeffect "ldrexd $0, ${0:H}, [r0]", "=&r,r"(i64* %addr)
10 %val5 = tail call i64 asm sideeffect "ldrexd $0, ${0:H}, [r0]", "=&r,r"(i64* %addr)
11 %val6 = tail call i64 asm sideeffect "ldrexd $0, ${0:H}, [r0]", "=&r,r"(i64* %addr)
12 %val7 = tail call i64 asm sideeffect "ldrexd $0, ${0:H}, [r0]", "=&r,r"(i64* %addr)
|
| atomic-64bit.ll | 9 ; CHECK: ldrexd [[REG1:(r[0-9]?[02468])]], [[REG2:(r[0-9]?[13579])]]
21 ; CHECK-THUMB: ldrexd [[REG1:[a-z0-9]+]], [[REG2:[a-z0-9]+]]
38 ; CHECK: ldrexd [[REG1:(r[0-9]?[02468])]], [[REG2:(r[0-9]?[13579])]]
50 ; CHECK-THUMB: ldrexd [[REG1:[a-z0-9]+]], [[REG2:[a-z0-9]+]]
67 ; CHECK: ldrexd [[REG1:(r[0-9]?[02468])]], [[REG2:(r[0-9]?[13579])]]
79 ; CHECK-THUMB: ldrexd [[REG1:[a-z0-9]+]], [[REG2:[a-z0-9]+]]
96 ; CHECK: ldrexd [[REG1:(r[0-9]?[02468])]], [[REG2:(r[0-9]?[13579])]]
108 ; CHECK-THUMB: ldrexd [[REG1:[a-z0-9]+]], [[REG2:[a-z0-9]+]]
125 ; CHECK: ldrexd [[REG1:(r[0-9]?[02468])]], [[REG2:(r[0-9]?[13579])]]
137 ; CHECK-THUMB: ldrexd [[REG1:[a-z0-9]+]], [[REG2:[a-z0-9]+]
[all...] |
| ldstrex-m.ll | 4 ; CHECK-NOT: ldrexd
20 ; CHECK-NOT: ldrexd
|
| ldstrex.ll | 9 ; CHECK: ldrexd
12 %ldrexd = tail call %0 @llvm.arm.ldrexd(i8* %p)
13 %0 = extractvalue %0 %ldrexd, 1
14 %1 = extractvalue %0 %ldrexd, 0
33 declare %0 @llvm.arm.ldrexd(i8*) nounwind readonly
|
| arm-modifier.ll | 64 ;CHECK: ldrexd [[REG1:(r[0-9]?[02468])]], {{r[0-9]?[13579]}}, [r{{[0-9]+}}]
65 %0 = tail call i64 asm sideeffect "ldrexd $0, ${0:H}, [$1]", "=&r,r,*Qo"(i64* %val, i64* %val) nounwind
|
| inlineasm-64bit.ll | 6 ; CHECK: ldrexd [[REG1:(r[0-9]?[02468])]], {{r[0-9]?[13579]}}, [r{{[0-9]+}}]
8 %1 = tail call i64 asm sideeffect "1: ldrexd $0, ${0:H}, [$2]\0A strexd $0, $3, ${3:H}, [$2]\0A teq $0, #0\0A bne 1b", "=&r,=*Qo,r,r,~{cc}"(i64* %p, i64* %p, i64 %val) nounwind
49 ; CHECK: ldrexd [[REG1:(r[0-9]?[02468])]], {{r[0-9]?[13579]}}, [r{{[0-9]+}}]
52 %1 = tail call { i64, i64 } asm sideeffect "@ atomic64_set\0A1: ldrexd $0, ${0:H}, [$3]\0Aldrexd $1, ${1:H}, [$3]\0A strexd $0, $4, ${4:H}, [$3]\0A teq $0, #0\0A bne 1b", "=&r,=&r,=*Qo,r,r,~{cc}"(i64* %p, i64* %p, i64 %i) nounwind
|
| /external/clang/test/CodeGen/ |
| arm-asm-variable.c | 16 "ldrexd%[_rl], %[_rh], [%[_p]]" \
20 // CHECK: call { i32, i32 } asm sideeffect "ldrexd$0, $1, [$2]", "=&{r1},=&{r2},r,~{memory}"(i64*
|
| arm-microsoft-intrinsics.c | 33 // CHECK-MSVC: @llvm.arm.ldrexd(i8* {{.*}})
|
| builtins-arm-exclusive.c | 69 // CHECK: call { i32, i32 } @llvm.arm.ldrexd(i8* %addr)
76 // CHECK: call { i32, i32 } @llvm.arm.ldrexd(i8* [[ADDR64_AS8]])
91 // CHECK: [[STRUCTRES:%.*]] = tail call { i32, i32 } @llvm.arm.ldrexd(i8* %addr)
|
| /external/llvm/test/MC/ARM/ |
| thumb2-ldrexd-strexd.s | 7 ldrexd r0, r1, [r2]
10 @ CHECK: ldrexd r0, r1, [r2] @ encoding: [0xd2,0xe8,0x7f,0x01]
|
| diagnostics.s | 298 @ Out of order Rt/Rt2 operands for ldrexd/strexd
299 ldrexd r4, r3, [r8]
303 @ CHECK-ERRORS: ldrexd r4, r3, [r8]
|
| /art/compiler/utils/arm/ |
| assembler_thumb2_test.cc | 173 TEST_F(AssemblerThumb2Test, ldrexd) {
174 GetAssembler()->ldrexd(arm::R0, arm::R1, arm::R0);
175 GetAssembler()->ldrexd(arm::R0, arm::R1, arm::R1);
176 GetAssembler()->ldrexd(arm::R0, arm::R1, arm::R2);
177 GetAssembler()->ldrexd(arm::R5, arm::R3, arm::R7);
180 "ldrexd r0, r1, [r0]\n"
181 "ldrexd r0, r1, [r1]\n"
182 "ldrexd r0, r1, [r2]\n"
183 "ldrexd r5, r3, [r7]\n";
184 DriverStr(expected, "ldrexd");
[all...] |
| assembler_arm32_test.cc | 700 TEST_F(AssemblerArm32Test, ldrexd) {
701 GetAssembler()->ldrexd(arm::R0, arm::R1, arm::R0);
702 GetAssembler()->ldrexd(arm::R0, arm::R1, arm::R1);
703 GetAssembler()->ldrexd(arm::R0, arm::R1, arm::R2);
706 "ldrexd r0, r1, [r0]\n"
707 "ldrexd r0, r1, [r1]\n"
708 "ldrexd r0, r1, [r2]\n";
709 DriverStr(expected, "ldrexd");
|
| /external/llvm/test/CodeGen/AArch64/ |
| arm64-ldxr-stxr.ll | 9 %ldrexd = tail call %0 @llvm.aarch64.ldxp(i8* %p)
10 %0 = extractvalue %0 %ldrexd, 1
11 %1 = extractvalue %0 %ldrexd, 0
148 %ldrexd = tail call %0 @llvm.aarch64.ldaxp(i8* %p)
149 %0 = extractvalue %0 %ldrexd, 1
150 %1 = extractvalue %0 %ldrexd, 0
|
| /external/compiler-rt/lib/builtins/arm/ |
| sync-ops.h | 43 ldrexd r0, r1, [r12] ; \
|
| /art/runtime/ |
| atomic.h | 78 "ldrexd %0, %H0, %1"
116 "ldrexd %0, %H0, %2\n"
|
| /art/compiler/optimizing/ |
| intrinsics_arm.cc | 498 __ ldrexd(trg_lo, trg_hi, IP);
574 // Potentially need temps for ldrexd-strexd loop.
640 __ ldrexd(temp_lo, temp_hi, IP);
[all...] |
| /art/compiler/dex/quick/arm/ |
| utility_arm.cc | [all...] |
| /external/llvm/test/Transforms/AtomicExpand/ARM/ |
| atomic-expansion-v8.ll | 192 ; CHECK: [[LOHI:%.*]] = call { i32, i32 } @llvm.arm.ldrexd(i8* [[PTR8]])
|
| atomic-expansion-v7.ll | 102 ; CHECK: [[LOHI:%.*]] = call { i32, i32 } @llvm.arm.ldrexd(i8* [[PTR8]])
330 ; CHECK: [[LOHI:%.*]] = call { i32, i32 } @llvm.arm.ldrexd(i8* [[PTR8]])
|
