| /external/valgrind/none/tests/mips32/ |
| unaligned_load_store.c | 17 printMem("PRE lwl");
20 "lwl $t0, 4($a0)" "\n\t"
23 "lwl $t1, 5($a0)" "\n\t"
26 "lwl $t2, 6($a0)" "\n\t"
29 "lwl $t3, 7($a0)" "\n\t"
35 printMem("POST lwl");
|
| unaligned_load_store.stdout.exp-BE | 1 PRE lwl
9 POST lwl
|
| unaligned_load_store.stdout.exp-LE | 1 PRE lwl
9 POST lwl
|
| /external/valgrind/none/tests/mips64/ |
| unaligned_load_store.c | 17 printMem("PRE lwl");
20 "lwl $t0, 4($a0)" "\n\t"
23 "lwl $t1, 5($a0)" "\n\t"
26 "lwl $t2, 6($a0)" "\n\t"
29 "lwl $t3, 7($a0)" "\n\t"
35 printMem("POST lwl");
|
| unaligned_load_store.stdout.exp-BE | 1 PRE lwl
9 POST lwl
|
| unaligned_load_store.stdout.exp-LE | 1 PRE lwl
9 POST lwl
|
| load_store.c | 69 /* lwl */
71 TEST1("lwl", i, reg_val1);
74 TEST1("lwl", i, reg_val2);
|
| /external/clang/test/CodeGen/ |
| mips-constraints-mem.c | 11 // switched due to the lwl/lwr instruction pairs.
12 // CHECK: %{{[0-9]+}} = call i32 asm sideeffect "lwl $0, 1 + $1\0A\09lwr $0, 2 + $1\0A\09", "=r,*R,~{$1}"(i32* %{{[0-9,a-f]+}}) #1,
20 "lwl %0, 1 + %1\n\t"
|
| /external/llvm/test/MC/Mips/ |
| sym-offset.ll | 12 ; check that the immediate fields of lwl and lwr are three apart.
13 ; 8841000e lwl at,14(v0)
|
| micromips-loadstore-unaligned.s | 12 # CHECK-EL: lwl $4, 16($5) # encoding: [0x85,0x60,0x10,0x00]
19 # CHECK-EB: lwl $4, 16($5) # encoding: [0x60,0x85,0x00,0x10]
23 lwl $4, 16($5)
|
| /external/v8/src/mips/ |
| codegen-mips.cc | 143 __ lwl(t8, MemOperand(a1));
301 __ lwl(v1,
307 __ lwl(v1, MemOperand(a1));
361 __ lwl(t0,
363 __ lwl(t1,
365 __ lwl(t2,
367 __ lwl(t3,
369 __ lwl(t4,
371 __ lwl(t5,
373 __ lwl(t6
[all...] |
| /external/llvm/test/CodeGen/Mips/ |
| load-store-left-right.ll | 28 ; MIPS32-EL: lwl $[[R0:[0-9]+]], 3($[[R1:[0-9]+]])
31 ; MIPS32-EB: lwl $[[R0:[0-9]+]], 0($[[R1:[0-9]+]])
37 ; MIPS64-EL: lwl $[[R0:[0-9]+]], 3($[[R1:[0-9]+]])
40 ; MIPS64-EB: lwl $[[R0:[0-9]+]], 0($[[R1:[0-9]+]])
80 ; MIPS32-EL: lwl $2, 3($[[R1:[0-9]+]])
82 ; MIPS32-EL: lwl $3, 7($[[R1:[0-9]+]])
85 ; MIPS32-EB: lwl $2, 0($[[R1:[0-9]+]])
87 ; MIPS32-EB: lwl $3, 4($[[R1:[0-9]+]])
111 ; MIPS32-EL: lwl $[[R0:[0-9]+]], 3($[[R1:[0-9]+]])
114 ; MIPS32-EB: lwl $[[R0:[0-9]+]], 0($[[R1:[0-9]+]]
[all...] |
| /external/libvpx/libvpx/third_party/libyuv/source/ |
| row_mips.cc | 199 "lwl $v1, 3(%[src]) \n"
232 "lwl $t0, 3(%[src]) \n"
235 " lwl $t1, 7(%[src]) \n"
240 "lwl $t2, 11(%[src]) \n"
242 "lwl $t3, 15(%[src]) \n"
244 "lwl $t4, 19(%[src]) \n"
246 "lwl $t5, 23(%[src]) \n"
248 "lwl $t6, 27(%[src]) \n"
250 "lwl $t7, 31(%[src]) \n"
262 "lwl $t0, 35(%[src]) \n
[all...] |
| /external/v8/src/mips64/ |
| codegen-mips64.cc | 301 __ lwl(v1,
352 __ lwl(a4,
354 __ lwl(a5,
356 __ lwl(a6,
358 __ lwl(a7,
360 __ lwl(t0,
362 __ lwl(t1,
364 __ lwl(t2,
366 __ lwl(t3,
385 __ lwl(a4
[all...] |
| /external/llvm/test/MC/Mips/mips32r6/ |
| invalid-mips1-wrong-error.s | 10 lwl $s4,-4231($15) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
|
| /external/llvm/test/MC/Mips/mips64r6/ |
| invalid-mips1-wrong-error.s | 10 lwl $s4,-4231($15) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
|
| invalid-mips3-wrong-error.s | 16 lwl $s4,-4231($15) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
|
| /bionic/libc/arch-mips/include/machine/ |
| asm.h | 63 #define LWLO lwl
74 #define LWHI lwl
|
| /development/ndk/platforms/android-21/arch-mips/include/machine/ |
| asm.h | 65 #define LWLO lwl
76 #define LWHI lwl
|
| /development/ndk/platforms/android-21/arch-mips64/include/machine/ |
| asm.h | 65 #define LWLO lwl
76 #define LWHI lwl
|
| /development/ndk/platforms/android-9/arch-mips/include/machine/ |
| asm.h | 68 #define LWLO lwl
79 #define LWHI lwl
|
| /prebuilts/ndk/8/platforms/android-14/arch-mips/usr/include/machine/ |
| asm.h | 68 #define LWLO lwl
79 #define LWHI lwl
|
| /prebuilts/ndk/8/platforms/android-9/arch-mips/usr/include/machine/ |
| asm.h | 68 #define LWLO lwl
79 #define LWHI lwl
|
| /prebuilts/ndk/9/platforms/android-12/arch-mips/usr/include/machine/ |
| asm.h | 68 #define LWLO lwl
79 #define LWHI lwl
|
| /prebuilts/ndk/9/platforms/android-13/arch-mips/usr/include/machine/ |
| asm.h | 68 #define LWLO lwl
79 #define LWHI lwl
|
