| /external/mesa3d/src/mesa/x86/ |
| sse_normal.S | 76 MOVSS ( M(0), XMM1 ) /* m0 */
77 MOVSS ( M(5), XMM2 ) /* m5 */
79 MOVSS ( ARG_SCALE, XMM0 ) /* scale */
90 MOVSS ( S(2), XMM2 ) /* uz */
92 MOVSS ( XMM2, D(2) ) /* ->D(2) */
138 MOVSS ( M(0), XMM0 ) /* m0 */
139 MOVSS ( M(4), XMM1 ) /* m4 */
142 MOVSS ( ARG_SCALE, XMM4 ) /* scale */
146 MOVSS ( M(1), XMM1 ) /* m1 */
147 MOVSS ( M(5), XMM2 ) /* m5 *
[all...] |
| sse_xform1.S | 82 MOVSS( S(0), XMM2 ) /* ox */
186 MOVSS( M(0), XMM0 ) /* m0 */
187 MOVSS( M(12), XMM1 ) /* m12 */
188 MOVSS( M(13), XMM2 ) /* m13 */
189 MOVSS( M(14), XMM3 ) /* m14 */
193 MOVSS( S(0), XMM4 ) /* ox */
196 MOVSS( XMM4, D(0) )
198 MOVSS( XMM2, D(1) )
199 MOVSS( XMM3, D(2) )
248 MOVSS( M(0), XMM1 ) /* m0 *
[all...] |
| sse_xform3.S | 85 MOVSS ( REGOFF(0, ESI), XMM4 ) /* | | | ox */
87 MOVSS ( REGOFF(4, ESI), XMM5 ) /* | | | oy */
89 MOVSS ( REGOFF(8, ESI), XMM6 ) /* | | | oz */
152 MOVSS ( S(2), XMM0 )
153 MOVSS ( XMM0, D(2) )
204 MOVSS ( M(0), XMM1 ) /* - | - | - | m0 */
205 MOVSS ( M(5), XMM2 ) /* - | - | - | m5 */
208 MOVSS ( M(10), XMM3 ) /* - | - | - | m10 */
209 MOVSS ( M(14), XMM4 ) /* - | - | - | m14 */
219 MOVSS ( S(2), XMM0 ) /* sz *
[all...] |
| sse_xform4.S | 78 MOVSS( SRC(0), XMM0 ) /* ox */
82 MOVSS( SRC(1), XMM1 ) /* oy */
86 MOVSS( SRC(2), XMM2 ) /* oz */
90 MOVSS( SRC(3), XMM3 ) /* ow */
150 MOVSS( SRC(0), XMM4 ) /* ox */
154 MOVSS( SRC(1), XMM5 ) /* oy */
158 MOVSS( SRC(2), XMM6 ) /* oz */
162 MOVSS( SRC(3), XMM7 ) /* ow */
171 MOVSS( SRC(3), XMM4 ) /* ow */
172 MOVSS( XMM4, DST(3) ) /* ->D(3) *
[all...] |
| sse_xform2.S | 82 MOVSS( S(0), XMM3 ) /* ox */
85 MOVSS( S(1), XMM4 ) /* oy */
192 MOVSS ( M(0), XMM1 ) /* - | - | - | m0 */
193 MOVSS ( M(5), XMM2 ) /* - | - | - | m5 */
196 MOVSS ( M(14), XMM3 ) /* - | - | - | m14 */
205 MOVSS ( XMM3, D(2) ) /* -> D(2) */
251 MOVSS ( M(0), XMM1 ) /* - | - | - | m0 */
252 MOVSS ( M(5), XMM2 ) /* - | - | - | m5 */
254 MOVSS ( M(14), XMM3 ) /* m14 */
262 MOVSS( XMM3, D(2) ) /* ->D(2) *
[all...] |
| /external/llvm/test/CodeGen/X86/ |
| vector-variable-idx.ll | 1 ; RUN: llc < %s -march=x86-64 | grep movss | count 2
|
| uint_to_fp-2.ll | 14 ; CHECK-NEXT: movss %xmm0, (%esp)
29 ; CHECK-NEXT: movss %xmm0, %xmm1
35 ; CHECK-NEXT: movss %xmm0, (%esp)
|
| sse-load-ret.ll | 1 ; RUN: llc < %s -march=x86 -mcpu=yonah | not grep movss
|
| reghinting.ll | 10 ; CHECK: movss
11 ; CHECK-NEXT: movss
|
| vec_extract-sse4.ll | 8 ; CHECK-NEXT: movss 12(%ecx), %xmm0
9 ; CHECK-NEXT: movss %xmm0, (%eax)
25 ; CHECK-NEXT: movss %xmm0, (%esp)
|
| cmov-fp.ll | 158 ; SSE: movss
161 ; NOSSE2: movss
176 ; SSE: movss
179 ; NOSSE2: movss
194 ; SSE: movss
197 ; NOSSE2: movss
212 ; SSE: movss
215 ; NOSSE2: movss
230 ; SSE: movss
233 ; NOSSE2: movss
[all...] |
| vec_extract.ll | 12 ; CHECK-NEXT: movss %xmm0, (%eax)
30 ; CHECK-NEXT: movss %xmm0, (%esp)
46 ; CHECK-NEXT: movss 12(%ecx), %xmm0
47 ; CHECK-NEXT: movss %xmm0, (%eax)
|
| vec_set-6.ll | 2 ; RUN: grep movss %t | count 1
|
| constant-combines.ll | 12 ; ever starts forming a zero store instead of movss, the test case has stopped
33 ; CHECK: movss %{{.*}}, 4(%rdi)
|
| extract-combine.ll | 8 %movss.i25611 = shufflevector <4 x float> zeroinitializer, <4 x float> %tmp518, <4 x i32> <i32 4, i32 1, i32 2, i32 3> ; <<4 x float>> [#uses=1]
9 %conv3.i25615 = shufflevector <4 x float> %movss.i25611, <4 x float> undef, <4 x i32> <i32 1, i32 2, i32 3, i32 0> ; <<4 x float>> [#uses=1]
|
| function-subtarget-features.ll | 5 ; In this case avx has a vmovss instruction and otherwise we should be using movss
23 ; CHECK: movss
31 ; CHECK: movss
|
| codegen-prepare.ll | 43 ; CHECK: movss 12([[THIS:%[a-zA-Z0-9]+]]), [[REGISTER:%[a-zA-Z0-9]+]]
44 ; CHECK-NEXT: movss [[REGISTER]], 60([[THIS]])
|
| fold-load-vec.ll | 4 ; We should not fold movss into pshufd since pshufd expects m128 while movss
|
| insertps-O0-bug.ll | 34 ; canonicalized into a scalar load plus scalar_to_vector (a movss).
39 ; CHECK-NOT: movss
|
| /external/compiler-rt/lib/builtins/i386/ |
| floatundixf.S | 31 movss 8(%esp), %xmm0 // hi 32 bits of input
32 movss 4(%esp), %xmm1 // lo 32 bits of input
|
| floatundidf.S | 39 movss 8(%esp), %xmm1 // high 32 bits of a
40 movss 4(%esp), %xmm0 // low 32 bits of a
|
| /bionic/libm/x86/ |
| ceilf.S | 34 movss 0x4(%esp),%xmm0
36 movss %xmm0,-0x4(%esp)
|
| floorf.S | 34 movss 0x4(%esp),%xmm0
36 movss %xmm0,-0x4(%esp)
|
| sqrtf.S | 34 movss 0x4(%esp),%xmm0
36 movss %xmm0,-0x4(%esp)
|
| truncf.S | 34 movss 0x4(%esp),%xmm0
36 movss %xmm0,-0x4(%esp)
|
