/external/llvm/lib/Target/R600/ |
VIInstrFormats.td | 116 bits<2> omod; 128 let Inst{60-59} = omod; 143 bits<2> omod; 154 let Inst{60-59} = omod;
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SIInstrInfo.td | 314 let Name = "OMod"; 378 def omod : Operand <i32> { 854 ClampMod:$clamp, omod:$omod) 864 ClampMod:$clamp, omod:$omod) 875 ClampMod:$clamp, omod:$omod) 904 "$dst, "#src0#src1#src2#"$clamp"#"$omod"); [all...] |
AMDGPUISelDAGToDAG.cpp | 113 SDValue &Clamp, SDValue &Omod) const; 116 SDValue &Omod) const; 119 SDValue &Omod) const; 801 // src0_modifiers, src0, src1_modifiers, src1, src2_modifiers, src2, clamp, omod [all...] |
R600InstrFormats.td | 128 bits<2> omod; 135 let Word1{6-5} = omod; 190 let Inst{39-38} = omod; 198 let Inst{38-37} = omod;
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SIInstrFormats.td | 349 bits<2> omod; 361 let Inst{60-59} = omod; 376 bits<2> omod; 385 let Inst{60-59} = omod;
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R600Instructions.td | 51 def OMOD : InstFlag <"printOMOD">; 96 (ins WRITE:$write, OMOD:$omod, REL:$dst_rel, CLAMP:$clamp, 101 "$clamp $last $dst$write$dst_rel$omod, " 138 OMOD:$omod, REL:$dst_rel, CLAMP:$clamp, 144 "$clamp $last $update_exec_mask$update_pred$dst$write$dst_rel$omod, " 960 OMOD:$omod_X, REL:$dst_rel_X, CLAMP:$clamp_X, 966 OMOD:$omod_Y, REL:$dst_rel_Y, CLAMP:$clamp_Y, 972 OMOD:$omod_Z, REL:$dst_rel_Z, CLAMP:$clamp_Z [all...] |
SIInstrInfo.h | 231 /// e.g. src[012]_mod, omod, clamp.
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SIShrinkInstructions.cpp | 113 if (TII->hasModifiersSet(MI, AMDGPU::OpName::omod))
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R600InstrInfo.cpp | [all...] |
SIInstructions.td | [all...] |
EvergreenInstructions.td | 376 let omod = 0;
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/external/mesa3d/src/gallium/drivers/r300/compiler/ |
r300_fragprog_emit.c | 284 if (inst->RGB.Omod) { 285 if (inst->RGB.Omod == RC_OMOD_DISABLE) { 289 (inst->RGB.Omod << R300_ALU_OUTC_MOD_SHIFT); 291 if (inst->Alpha.Omod) { 292 if (inst->Alpha.Omod == RC_OMOD_DISABLE) { 296 (inst->Alpha.Omod << R300_ALU_OUTC_MOD_SHIFT);
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radeon_pair_translate.c | 315 pair->RGB.Omod = inst->Omod; 318 pair->Alpha.Omod = inst->Omod;
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radeon_program_pair.h | 79 unsigned int Omod:3;
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radeon_compiler.c | 393 if (tmp->U.P.RGB.Omod != RC_OMOD_MUL_1 && 394 tmp->U.P.RGB.Omod != RC_OMOD_DISABLE) { 397 if (tmp->U.P.Alpha.Omod != RC_OMOD_MUL_1 && 398 tmp->U.P.Alpha.Omod != RC_OMOD_DISABLE) { 441 "~%4u OMOD Operations\n"
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radeon_program_print.c | 301 print_omod_op(f, inst->U.I.Omod); 402 print_omod_op(f, inst->RGB.Omod); 437 print_omod_op(f, inst->Alpha.Omod);
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radeon_program.h | 125 rc_omod_op Omod;
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radeon_pair_schedule.c | 662 rgb->Alpha.Omod = alpha->Alpha.Omod; 949 pair_inst->Alpha.Omod = pair_inst->RGB.Omod; [all...] |
r500_fragprog_emit.c | 325 code->inst[ip].inst3 |= inst->RGB.Omod << R500_ALU_RGB_OMOD_SHIFT; 326 code->inst[ip].inst4 |= inst->Alpha.Omod << R500_ALPHA_OMOD_SHIFT;
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radeon_optimize.c | 525 || inst->U.I.Omod) { 823 writer->Inst->U.I.Omod = omod_op;
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/external/mesa3d/src/gallium/drivers/r600/ |
r700_asm.c | 69 S_SQ_ALU_WORD1_OP2_OMOD(alu->omod) |
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r600_asm.h | 61 unsigned omod; member in struct:r600_bytecode_alu
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/external/mesa3d/src/gallium/drivers/radeon/ |
SIISelLowering.cpp | 91 .addImm(0) // OMOD 106 .addImm(0) // OMOD 121 .addImm(0) // OMOD
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SIInstrInfo.td | 410 bits<2> OMOD; 421 let Inst{60-59} = OMOD;
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/external/mesa3d/src/gallium/drivers/radeon/MCTargetDesc/ |
R600MCCodeEmitter.cpp | 385 // XXX: Emit OMOD (1 byte) Not implemented.
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