| /external/llvm/lib/Target/PowerPC/Disassembler/ |
| PPCDisassembler.cpp | 10 #include "PPC.h"
19 #define DEBUG_TYPE "ppc-disassembler"
57 PPC::CR0, PPC::CR1, PPC::CR2, PPC::CR3,
58 PPC::CR4, PPC::CR5, PPC::CR6, PPC::CR
[all...] |
| /external/llvm/lib/Target/PowerPC/MCTargetDesc/ |
| PPCPredicates.cpp | 1 //===-- PPCPredicates.cpp - PPC Branch Predicate Information --------------===//
19 PPC::Predicate PPC::InvertPredicate(PPC::Predicate Opcode) {
21 case PPC::PRED_EQ: return PPC::PRED_NE;
22 case PPC::PRED_NE: return PPC::PRED_EQ;
23 case PPC::PRED_LT: return PPC::PRED_GE
[all...] |
| /external/libpng/scripts/ |
| SCOPTIONS.ppc | 7 INCLUDEDIR=hlp:ppc/include
|
| /external/clang/test/CodeGen/ |
| builtins-ppc-p8vector.c | 4 // RUN: not %clang_cc1 -faltivec -triple powerpc64-unknown-unknown -emit-llvm %s -o - 2>&1 | FileCheck %s -check-prefix=CHECK-PPC
24 // CHECK: @llvm.ppc.altivec.vcmpequd
25 // CHECK-LE: @llvm.ppc.altivec.vcmpequd
26 // CHECK-PPC: error: call to 'vec_cmpeq' is ambiguous
29 // CHECK: @llvm.ppc.altivec.vcmpequd
30 // CHECK-LE: @llvm.ppc.altivec.vcmpequd
31 // CHECK-PPC: error: call to 'vec_cmpeq' is ambiguous
35 // CHECK: @llvm.ppc.altivec.vcmpgtsd
36 // CHECK-LE: @llvm.ppc.altivec.vcmpgtsd
37 // CHECK-PPC: error: call to 'vec_cmpgt' is ambiguou
[all...] |
| builtins-ppc-htm.c | 8 // CHECK: @llvm.ppc.tbegin
10 // CHECK: @llvm.ppc.tbegin
12 // CHECK: @llvm.ppc.tend
14 // CHECK: @llvm.ppc.tendall
17 // CHECK: @llvm.ppc.tabort
19 // CHECK: @llvm.ppc.tabort
21 // CHECK: @llvm.ppc.tabortdc
23 // CHECK: @llvm.ppc.tabortdc
25 // CHECK: @llvm.ppc.tabortwc
27 // CHECK: @llvm.ppc.tabortw
[all...] |
| builtins-ppc-altivec.c | 52 // CHECK: @llvm.ppc.altivec.vmaxsb
54 // CHECK-LE: @llvm.ppc.altivec.vmaxsb
58 // CHECK: @llvm.ppc.altivec.vmaxsh
60 // CHECK-LE: @llvm.ppc.altivec.vmaxsh
64 // CHECK: @llvm.ppc.altivec.vmaxsw
66 // CHECK-LE: @llvm.ppc.altivec.vmaxsw
74 // CHECK: @llvm.ppc.altivec.vsubsbs
75 // CHECK: @llvm.ppc.altivec.vmaxsb
76 // CHECK-LE: @llvm.ppc.altivec.vsubsbs
77 // CHECK-LE: @llvm.ppc.altivec.vmaxs
[all...] |
| builtins-ppc-vsx.c | 27 // CHECK: @llvm.ppc.vsx.xvdivsp
30 // CHECK: @llvm.ppc.vsx.xvdivdp
34 // CHECK: @llvm.ppc.vsx.xvmaxsp
37 // CHECK: @llvm.ppc.vsx.xvmaxdp
40 // CHECK: @llvm.ppc.vsx.xvmaxsp
44 // CHECK: @llvm.ppc.vsx.xvminsp
47 // CHECK: @llvm.ppc.vsx.xvmindp
50 // CHECK: @llvm.ppc.vsx.xvminsp
53 // CHECK: @llvm.ppc.vsx.xsmaxdp
56 // CHECK: @llvm.ppc.vsx.xsmind
[all...] |
| ppc-varargs-struct.c | 4 // RUN: %clang_cc1 -triple powerpc-unknown-linux-gnu -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-PPC
22 // CHECK-PPC: [[ARRAYDECAY:%[a-z0-9]+]] = getelementptr inbounds [1 x %struct.__va_list_tag], [1 x %struct.__va_list_tag]* %ap, i32 0, i32 0
23 // CHECK-PPC-NEXT: [[GPRPTR:%[a-z0-9]+]] = bitcast %struct.__va_list_tag* [[ARRAYDECAY]] to i8*
24 // CHECK-PPC-NEXT: [[ZERO:%[0-9]+]] = ptrtoint i8* [[GPRPTR]] to i32
25 // CHECK-PPC-NEXT: [[ONE:%[0-9]+]] = add i32 [[ZERO]], 1
26 // CHECK-PPC-NEXT: [[TWO:%[0-9]+]] = inttoptr i32 [[ONE]] to i8*
27 // CHECK-PPC-NEXT: [[THREE:%[0-9]+]] = add i32 [[ONE]], 3
28 // CHECK-PPC-NEXT: [[FOUR:%[0-9]+]] = inttoptr i32 [[THREE]] to i8**
29 // CHECK-PPC-NEXT: [[FIVE:%[0-9]+]] = add i32 [[THREE]], 4
30 // CHECK-PPC-NEXT: [[SIX:%[0-9]+]] = inttoptr i32 [[FIVE]] to i8*
[all...] |
| builtins-ppc-p7.c | 14 // CHECK @llvm.ppc.divwe
23 // CHECK @llvm.ppc.divweu
32 // CHECK @llvm.ppc.divde
41 // CHECK @llvm.ppc.divdeu
50 // CHECK @llvm.ppc.bpermd
|
| /external/llvm/test/CodeGen/PowerPC/ |
| 2007-09-04-AltivecDST.ll | 5 tail call void @llvm.ppc.altivec.dst( i8* %image, i32 8, i32 0 )
6 tail call void @llvm.ppc.altivec.dstt( i8* %image, i32 8, i32 0 )
7 tail call void @llvm.ppc.altivec.dstst( i8* %image, i32 8, i32 0 )
8 tail call void @llvm.ppc.altivec.dststt( i8* %image, i32 8, i32 0 )
12 declare void @llvm.ppc.altivec.dst(i8*, i32, i32)
13 declare void @llvm.ppc.altivec.dstt(i8*, i32, i32)
14 declare void @llvm.ppc.altivec.dstst(i8*, i32, i32)
15 declare void @llvm.ppc.altivec.dststt(i8*, i32, i32)
|
| htm.ll | 7 %0 = tail call i32 @llvm.ppc.tbegin(i32 0)
17 declare i32 @llvm.ppc.tbegin(i32) #1
22 %0 = tail call i32 @llvm.ppc.tend(i32 0)
29 declare i32 @llvm.ppc.tend(i32)
34 %0 = tail call i32 @llvm.ppc.tabort(i32 0)
35 %1 = tail call i32 @llvm.ppc.tabortdc(i32 0, i32 1, i32 2)
36 %2 = tail call i32 @llvm.ppc.tabortdci(i32 0, i32 1, i32 2)
37 %3 = tail call i32 @llvm.ppc.tabortwc(i32 0, i32 1, i32 2)
38 %4 = tail call i32 @llvm.ppc.tabortwci(i32 0, i32 1, i32 2)
48 declare i32 @llvm.ppc.tabort(i32
[all...] |
| vec_mul_even_odd.ll | 6 declare <2 x i64> @llvm.ppc.altivec.vmuleuw(<4 x i32>, <4 x i32>) nounwind readnone
7 declare <2 x i64> @llvm.ppc.altivec.vmulesw(<4 x i32>, <4 x i32>) nounwind readnone
8 declare <2 x i64> @llvm.ppc.altivec.vmulouw(<4 x i32>, <4 x i32>) nounwind readnone
9 declare <2 x i64> @llvm.ppc.altivec.vmulosw(<4 x i32>, <4 x i32>) nounwind readnone
10 declare <4 x i32> @llvm.ppc.altivec.vmuluwm(<4 x i32>, <4 x i32>) nounwind readnone
13 %tmp = tail call <2 x i64> @llvm.ppc.altivec.vmuleuw(<4 x i32> %x, <4 x i32> %y)
19 %tmp = tail call <2 x i64> @llvm.ppc.altivec.vmulesw(<4 x i32> %x, <4 x i32> %y)
25 %tmp = tail call <2 x i64> @llvm.ppc.altivec.vmulouw(<4 x i32> %x, <4 x i32> %y)
31 %tmp = tail call <2 x i64> @llvm.ppc.altivec.vmulosw(<4 x i32> %x, <4 x i32> %y)
|
| /external/llvm/lib/Target/PowerPC/AsmParser/ |
| PPCAsmParser.cpp | 36 PPC::R0, PPC::R1, PPC::R2, PPC::R3,
37 PPC::R4, PPC::R5, PPC::R6, PPC::R7,
38 PPC::R8, PPC::R9, PPC::R10, PPC::R11
[all...] |
| /external/llvm/lib/Target/PowerPC/ |
| PPCRegisterInfo.h | 18 #include "PPC.h"
28 if (SrcReg == PPC::CR0LT || SrcReg == PPC::CR0GT ||
29 SrcReg == PPC::CR0EQ || SrcReg == PPC::CR0UN)
30 Reg = PPC::CR0;
31 else if (SrcReg == PPC::CR1LT || SrcReg == PPC::CR1GT ||
32 SrcReg == PPC::CR1EQ || SrcReg == PPC::CR1UN
[all...] |
| PPCInstrInfo.cpp | 16 #include "PPC.h"
42 #define DEBUG_TYPE "ppc-instr-info"
49 opt<bool> DisableCTRLoopAnal("disable-ppc-ctrloop-analysis", cl::Hidden,
52 static cl::opt<bool> DisableCmpOpt("disable-ppc-cmp-opt",
55 static cl::opt<bool> VSXSelfCopyCrash("crash-on-ppc-vsx-self-copy",
63 : PPCGenInstrInfo(PPC::ADJCALLSTACKDOWN, PPC::ADJCALLSTACKUP),
73 if (Directive == PPC::DIR_440 || Directive == PPC::DIR_A2 ||
74 Directive == PPC::DIR_E500mc || Directive == PPC::DIR_E5500)
[all...] |
| PPCFrameLowering.cpp | 1 //===-- PPCFrameLowering.cpp - PPC Frame Information ----------------------===//
10 // This file contains the PPC implementation of TargetFrameLowering class.
34 PPC::V0 , PPC::V1 , PPC::V2 , PPC::V3 , PPC::V4 , PPC::V5 , PPC::V6 , PPC::V7
[all...] |
| PPCRegisterInfo.cpp | 16 #include "PPC.h"
53 EnableBasePointer("ppc-use-base-pointer", cl::Hidden, cl::init(true),
57 AlwaysBasePointer("ppc-always-use-base-pointer", cl::Hidden, cl::init(false),
61 : PPCGenRegisterInfo(TM.isPPC64() ? PPC::LR8 : PPC::LR,
65 ImmToIdxMap[PPC::LD] = PPC::LDX; ImmToIdxMap[PPC::STD] = PPC::STDX;
66 ImmToIdxMap[PPC::LBZ] = PPC::LBZX; ImmToIdxMap[PPC::STB] = PPC::STBX
[all...] |
| PPCTLSDynamicCall.cpp | 25 #include "PPC.h"
36 #define DEBUG_TYPE "ppc-tls-dynamic-call"
61 if (MI->getOpcode() != PPC::ADDItlsgdLADDR &&
62 MI->getOpcode() != PPC::ADDItlsldLADDR &&
63 MI->getOpcode() != PPC::ADDItlsgdLADDR32 &&
64 MI->getOpcode() != PPC::ADDItlsldLADDR32)
72 unsigned GPR3 = Is64Bit ? PPC::X3 : PPC::R3;
82 case PPC::ADDItlsgdLADDR:
83 Opc1 = PPC::ADDItlsgdL
[all...] |
| /external/libxml2/win32/wince/ |
| libxml2.vcl | 11 /nologo /W3 /Zi /Od /I "..\..\..\include" /I "..\..\include" /I "c:\ppc\libxml\XML\win32\wince" /D "DEBUG" /D _WIN32_WCE=300 /D "WIN32" /D "STRICT" /D "_WIN32_WCE_EMULATION" /D "INTERNATIONAL" /D "USA" /D "INTLMSG_CODEPAGE" /D "WIN32_PLATFORM_PSPC" /D "i486" /D UNDER_CE=300 /D "UNICODE" /D "_UNICODE" /D "_X86_" /D "x86" /Fp"X86EMDbg/libxml2.pch" /YX /Fo"X86EMDbg/" /Fd"X86EMDbg/" /Gz /c
12 "C:\ppc\libxml\XML\DOCBparser.c"
13 "C:\ppc\libxml\XML\encoding.c"
14 "C:\ppc\libxml\XML\entities.c"
15 "C:\ppc\libxml\XML\error.c"
16 "C:\ppc\libxml\XML\globals.c"
17 "C:\ppc\libxml\XML\hash.c"
18 "C:\ppc\libxml\XML\list.c"
19 "C:\ppc\libxml\XML\parser.c"
20 "C:\ppc\libxml\XML\parserInternals.c
[all...] |
| /external/llvm/lib/Target/PowerPC/InstPrinter/ |
| PPCInstPrinter.cpp | 1 //===-- PPCInstPrinter.cpp - Convert PPC MCInst to assembly syntax --------===//
10 // This class prints an PPC MCInst to a .s file.
31 FullRegNames("ppc-asm-full-reg-names", cl::Hidden, cl::init(false),
56 if (MI->getOpcode() == PPC::RLWINM) {
79 if ((MI->getOpcode() == PPC::OR || MI->getOpcode() == PPC::OR8) &&
89 if (MI->getOpcode() == PPC::RLDICR) {
126 switch ((PPC::Predicate)Code) {
127 case PPC::PRED_LT_MINUS:
128 case PPC::PRED_LT_PLUS
[all...] |
| /external/clang/test/Driver/ |
| darwin-arch-default.c | 1 // Check that the name of the arch we bind is "ppc" not "powerpc".
5 // RUN: FileCheck --check-prefix=CHECK-BIND-PPC < %t %s
7 // CHECK-BIND-PPC: bind-arch, "ppc"
19 // RUN: FileCheck --check-prefix=CHECK-AS-PPC < %t %s
21 // CHECK-AS-PPC: {{as(.exe)?"}}
22 // CHECK-AS-PPC: "-arch" "ppc"
34 // RUN: FileCheck --check-prefix=CHECK-LD-PPC < %t %s
36 // CHECK-LD-PPC: {{ld(.exe)?"}
[all...] |
| /external/libmtp/src/ |
| gphoto2-endian.h | 4 #include "gphoto2-endian-ppc.h"
|
| /external/valgrind/drd/tests/ |
| pth_create_chain.vgtest | 1 prereq: ./supported_libpthread && [ `uname -m` != ppc ] && [ `uname -m` != ppc64 ] && [ `uname -m` != ppc64le ]
|
| /external/compiler-rt/test/builtins/Unit/ppc/ |
| test | 2 if gcc -arch ppc -O0 $FILE ../../../Release/ppc/libcompiler_rt.Optimized.a -mlong-double-128
|
| /external/llvm/test/Transforms/InstCombine/ |
| aligned-qpx.ll | 5 declare <4 x double> @llvm.ppc.qpx.qvlfs(i8*) #1
11 %vl = call <4 x double> @llvm.ppc.qpx.qvlfs(i8* %hv)
14 ; CHECK: @llvm.ppc.qpx.qvlfs
27 %vl = call <4 x double> @llvm.ppc.qpx.qvlfs(i8* %hv)
30 ; CHECK-NOT: @llvm.ppc.qpx.qvlfs
39 declare void @llvm.ppc.qpx.qvstfs(<4 x double>, i8*) #0
45 call void @llvm.ppc.qpx.qvstfs(<4 x double> %d, i8* %hv)
51 ; CHECK: @llvm.ppc.qpx.qvstfs
59 call void @llvm.ppc.qpx.qvstfs(<4 x double> %d, i8* %hv)
65 ; CHECK-NOT: @llvm.ppc.qpx.qvstf
[all...] |
